IP Library › Granted Patent US 8,022,467
Granted Patent B2
US 8,022,467 · App. 12/467,424 · Granted Sep 20, 2011

Nonvolatile semiconductor memory device and method of fabricating the same

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,022,467
App. No.
12/467,424
Granted
Sep 20, 2011
Kind
B2
Abstract

A nonvolatile semiconductor memory device includes a first insulating layer, charge storage layers, element isolation insulating films, and a second insulating layer formed on the charge storage layers and the element isolation insulating films and including a stacked structure of a first silicon nitride film, first silicon oxide film, intermediate insulating film and second silicon oxide film. The first silicon nitride film has a nitrogen concentration of not less than 21×10 15 atoms/cm 2 . Each element isolation insulating film includes a high-temperature oxide film formed along lower side surfaces of the charge storage layers between the charge storage layers and a coating type insulating film. The first silicon nitride film is formed on an upper surface of the high-temperature oxide film in upper surfaces of the element isolation insulating films and not on the upper surface of the coating type insulating film.

Claims (13)

1. A nonvolatile semiconductor memory device comprising:

a semiconductor substrate;

a first insulating layer formed on the semiconductor substrate;

a plurality of charge storage layers formed on the first insulating layer;

a plurality of element isolation insulating films formed between the charge storage layers respectively;

a second insulating layer formed on the charge storage layers and the element isolation insulating films, the second insulating layer including a stacked structure of a first silicon nitride film, a first silicon oxide film, an intermediate insulating film having a relative dielectric constant of not less than 7 and a second silicon oxide film; and

a control electrode formed on the second insulating layer,

wherein the first silicon nitride film has a nitrogen concentration of not less than 21×10 15 atoms/cm 2 ;

wherein the charge storage layers have respective lower side surfaces, and each element isolation insulating film includes a high-temperature oxide film formed along the lower side surfaces of the charge storage layers between the charge storage layers and a coating insulating film formed on an inside of the high-temperature oxide film; and

wherein the high-temperature oxide film and the coating insulating film have respective upper surfaces, and the first silicon nitride film is formed on the upper surface of the high-temperature oxide film in upper surfaces of the element isolation insulating films and not on the upper surface of the coating insulating film.

2. The nonvolatile semiconductor memory device according to claim 1 , wherein the first silicon nitride film is divided between the charge storage layers.

3. The nonvolatile semiconductor memory device according to claim 1 , wherein the first silicon oxide film is formed directly on the element isolation insulating film.

4. The nonvolatile semiconductor memory device according to claim 1 , wherein the second insulating layer includes a second silicon nitride film formed on the second silicon oxide film.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2009
From: IIKAWA, HIROFUMI; TANAKA, MASAYUKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 022698/0118 →
Priority Claims (1)
JP 2008-275558 · Oct 27, 2008 · national
Continuity (1)
Related Publication 20100102377A1 · Apr 29, 2010