Phase-change memory and method of making same
A phase-change memory cell structure includes a bottom diode on a substrate; a heating stem on the bottom diode; a first dielectric layer surrounding the heating stem, wherein the first dielectric layer forms a recess around the heating stem; a phase-change storage cap capping the heating stem and the first dielectric layer; and a second dielectric layer covering the first dielectric layer and the phase-change storage cap wherein the second dielectric layer defines an air gap in the recess.
1. A phase-change memory cell structure, comprising:
a bottom diode on a substrate;
a heating stem on the bottom diode;
a first dielectric layer surrounding the heating stem, wherein the first dielectric layer forms a recess around the heating stem, wherein the first dielectric layer extends to a sidewall of the heating stem and encompasses the heating stem to form an upward protruding cylindrical feature;
a phase-change storage cap capping the heating stem and the first dielectric layer, wherein the phase-change storage cap at least covers an upper portion of a sidewall of the upward protruding cylindrical feature underneath the phase-change storage cap; and
a second dielectric layer covering the first dielectric layer and the phase-change storage cap wherein the second dielectric layer defines an air gap in the recess.
2. The phase-change memory cell structure according to claim 1 wherein the phase-change storage cap has a tapered profile.
3. The phase-change memory cell structure according to claim 1 wherein the phase-change storage cap comprises chalcogenide compounds.
4. The phase-change memory cell structure according to claim 1 wherein the bottom diode comprises a conductive electrode.
5. The phase-change memory cell structure according to claim 4 wherein the conductive electrode comprises doped polysilicon, doped Si, doped SiGe, TiW, or TiN.
6. The phase-change memory cell structure according to claim 4 wherein the conductive electrode is electrically connected to an N + base line buried in the substrate.
7. The phase-change memory cell structure according to claim 1 wherein the first dielectric layer comprises silicon oxide or silicon nitride.
8. The phase-change memory cell structure according to claim 1 wherein the first dielectric layer has a thickness ranging between 50 angstroms and 500 angstroms.
9. The phase-change memory cell structure according to claim 1 wherein the second dielectric layer comprises silicon oxide, silicon oxy-nitride, silicon nitride or low-k dielectrics.