Semiconductor device and manufacturing method thereof

1. A semiconductor device, comprising:

a silicon substrate; and

a field effect transistor comprising a gate insulating film over the silicon substrate, a gate electrode on the gate insulating film, and source and drain regions,

wherein said gate electrode comprises, at least in part in contact with said gate insulating film, a first silicide region having an NiSi2 phase and containing a p-type impurity element and a second silicide region having an NiSi phase disposed above the first silicide region;

the silicide making up said crystallized Ni silicide region is of a composition represented by Ni x Si 1-x (0.2≦x<0.4); and

said gate insulating film comprises a silicon oxide film, a silicon oxynitride film or a silicon nitride film, the silicon oxide film, the silicon oxynitride film or the silicon nitride film being in contact with said crystallized Ni silicide region of the gate electrode.

2. The semiconductor device according to claim 1 , wherein the gate insulating film further comprises a high dielectric constant insulating film under the silicon oxide film, the silicon oxynitride film or the silicon nitride film.

3. The semiconductor device according to claim 1 , wherein the silicide making up said crystallized Ni silicide region comprises an NiSi 2 phase.

4. The semiconductor device according to claim 1 , wherein said silicon substrate comprises, at least in part in contact with the gate insulating film, a region containing fluorine atoms in the case of a P-channel transistor and a region containing nitrogen atoms in the case of an N-channel transistor.

5. A semiconductor device, comprising:

a silicon substrate;

a P-channel field effect transistor comprising a first gate insulating film over said silicon substrate, a first gate electrode on the first gate insulating film, and first source and drain regions; and

an N-channel field effect transistor comprising a second gate insulating film over said silicon substrate, a second gate electrode on the second gate insulating film, and second source and drain regions,

wherein the first gate electrode comprises, at least in part in contact with the first gate insulating film, a crystallized Ni silicide region containing p-type impurities;

the second gate electrode comprises, at least in part in contact with the second gate insulating film, a crystallized Ni silicide region containing n-type impurities;

at least one of the crystallized Ni silicide regions of the first and second gate electrodes includes a first silicide region having an NiSi2 phase and a second silicide region having an NiSi phase disposed above the first silicide region;

the silicides making up the crystallized Ni silicide regions of the first and second gate electrodes are of a composition represented by Ni x Si 1-x (0.2≦x<0.4);

the first gate insulating film comprises a silicon oxide film, a silicon oxynitride film or a silicon nitride film, the silicon oxide film, the silicon oxynitride film or the silicon nitride film being in contact with the crystallized Ni silicide region of the first gate electrode; and

the second gate insulating film comprises a silicon oxide film, a silicon oxynitride film or a silicon nitride film, the silicon oxide film, the silicon oxynitride film or the silicon nitride film being in contact with the crystallized Ni silicide region of the second gate electrode.

6. The semiconductor device according to claim 5 , wherein the first gate insulating film further comprises a high dielectric constant insulating film under the silicon oxide film, the silicon oxynitride film or the silicon nitride film, and

the second gate insulating film further comprises a high dielectric constant insulating film under the silicon oxide film, the silicon oxynitride film or the silicon nitride film.

7. The semiconductor device according to claim 5 , wherein the silicides making up the crystallized Ni silicide regions of the first and second gate electrodes comprises NiSi 2 phases.

8. The semiconductor device according to claim 5 , wherein the first and second gate electrodes comprise, in respective parts in contact with the first and second gate insulating films, a high concentrated-impurity region containing an impurity element of a higher concentration than an upper region above the high concentrated-impurity region.

9. The semiconductor device according to claim 5 , wherein the first and second gate electrodes comprise, in respective parts in contact with the first and second gate insulating films, a region having impurity concentration of 1×10 20 cm −3 or above.

10. The semiconductor device according to claim 5 , wherein the first and second gate insulating films are silicon oxide films or silicon oxynitride films.

11. The semiconductor device according to claim 5 , wherein said silicon substrate comprises, at least in part in contact with the first gate insulating film, a region containing fluorine atoms.

12. The semiconductor device according to claim 5 , wherein said silicon substrate comprises, at least in part in contact with the second gate insulating film, a region containing nitrogen atoms.

13. A method of manufacturing the semiconductor device as recited in claim 5 , comprising:

providing a silicon substrate comprising an n-type active region and a p-type active region;

forming a insulating film for first and second gate insulating films over said silicon substrate;

forming a silicon film for gate over said insulating film;

adding p-type impurities to said silicon film for gate in a region where a P-channel field effect transistor is to be formed;

adding n-type impurities to said silicon film for gate in a region where an N-channel field effect transistor is to be formed;

forming a gate pattern by processing said silicon film for gate;

forming first source and drain regions in the region where the P-channel field effect transistor is to be formed;

forming second source and drain regions in the region where the N-channel field effect transistor is to be formed;

forming an interlayer insulating film so as to cover said gate pattern;

removing upper part of the interlayer insulating film so as to expose said gate pattern;

forming a nickel film over the exposed gate pattern;

conducting heat treatment to silicide said gate pattern, thereby forming first and second gate electrodes; and

selectively removing superfluous nickel of unsilicided part of said nickel film.

14. The method according to claim 13 , wherein the p-type impurities and the n-type impurities are added by ion implantation.

15. The method according to claim 13 , further comprising: adding fluorine to the silicon substrate in the region where the P-channel field effect transistor is to be formed before forming the insulating film for the first and second gate insulating films.

16. The method according to claim 13 , further comprising:

adding nitrogen to the silicon substrate in the region where the N-channel field effect transistor is to be formed before forming the insulating film for the first and second gate insulating films.

17. The method according to claim 15 , further comprising:

adding nitrogen to the silicon substrate in the region where the N-channel field effect transistor is to be formed before forming the insulating film for the first and second gate insulating films.

18. The semiconductor device according to claim 11 , wherein said silicon substrate comprises, at least in part in contact with the second gate insulating film, a region containing nitrogen atoms.

19. The semiconductor device according to claim 1 , wherein the gate electrode comprises, in a part in contact with the gate insulating film, a high concentrated-impurity region containing an impurity element of a higher concentration than an upper region above the high concentrated-impurity region.

20. The semiconductor device according to claim 19 , wherein the high concentrated-impurity region has impurity concentration of 1×10 20 cm −3 or above.

21. The semiconductor device according to claim 8 , wherein the high concentrated-impurity region has impurity concentration of 1×10 20 cm −3 or above.

22. A semiconductor device, comprising:

a silicon substrate; and

a field effect transistor comprising a gate insulating film over the silicon substrate, a gate electrode on the gate insulating film, and source and drain regions,

wherein said gate electrode comprises, at least in part in contact with said gate insulating film, a crystallized Ni silicide region containing an impurity element of a conductivity type opposite to a conductivity type of a channel region in the field effect transistor,

the silicide making up said crystallized Ni silicide region is of a composition represented by Ni x Si 1-x (0.2≦x<0.4),

said gate insulating film comprises a silicon oxide film, a silicon oxynitride film or a silicon nitride film, the silicon oxide film, the silicon oxynitride film or the silicon nitride film being in contact with said crystallized Ni silicide region of the gate electrode, and

the gate electrode comprises a first silicide region comprising an NiSi 2 phase, the first silicide region being in contact with the gate insulating film, and a second silicide region comprising an NiSi phase, the second silicide region being above the first silicide region.

23. A semiconductor device, comprising:

a silicon substrate;

a P-channel field effect transistor comprising a first gate insulating film over said silicon substrate, a first gate electrode on the first gate insulating film, and first source and drain regions; and

an N-channel field effect transistor comprising a second gate insulating film over said silicon substrate, a second gate electrode on the second gate insulating film, and second source and drain regions,

wherein the first gate electrode comprises, at least in part in contact with the first gate insulating film, a crystallized Ni silicide region containing p-type impurities,

the second gate electrode comprises, at least in part in contact with the second gate insulating film, a crystallized Ni silicide region containing n-type impurities,

the silicides making up the crystallized Ni silicide regions of the first and second gate electrodes are of a composition represented by Ni x Si 1-x (0.2≦x<0.4),

the first gate insulating film comprises a silicon oxide film, a silicon oxynitride film or a silicon nitride film, the silicon oxide film, the silicon oxynitride film or the silicon nitride film being in contact with the crystallized Ni silicide region of the first gate electrode,

the second gate insulating film comprises a silicon oxide film, a silicon oxynitride film or a silicon nitride film, the silicon oxide film, the silicon oxynitride film or the silicon nitride film being in contact with the crystallized Ni silicide region of the second gate electrode, and

the first and second gate electrodes each comprise a first silicide region comprising an NiSi 2 phase, the first silicide region being in contact with the first or second gate insulating film, and a second silicide region comprising an NiSi phase, the second silicide region being above the first silicide region.

24. The semiconductor device according to claim 1 , further comprising an n-type well formed on a surface of the silicon substrate, wherein the gate insulating film is formed on the n-type well.

25. The semiconductor device according to claim 1 , wherein the field effect transistor is a P-channel transistor.