IP Library Granted Patent US 8,030,864
Granted Patent B2
US 8,030,864 · App. 12/483,168 · Granted Oct 4, 2011

Motor drive circuit

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Quick Facts
Patent No.
US 8,030,864
App. No.
12/483,168
Granted
Oct 4, 2011
Kind
B2
Abstract

A motor drive circuit includes a first amplifier circuit to amplify a difference between first and second position detection signals with a gain becoming smaller according to drop in power supply voltage, to output a first amplification signal, the first and second position detection signals being signals indicating a rotational position of a rotor in a motor, having a frequency corresponding to a rotation speed of the motor, and being opposite in phase to each other; a second amplifier circuit to amplify the difference between the first and second position detection signals with the gain, to output a second amplification signal opposite in phase to the first amplification signal; and a drive circuit to amplify the difference between the first amplification signal and the second amplification signal with a predetermined gain to be saturated at the power supply voltage, to output a driving voltage for driving the motor.

Claims (24)

1. A motor drive circuit comprising:

a first amplifier circuit configured to amplify a difference between first and second position detection signals with a gain becoming smaller according to drop in power supply voltage, to output a first amplification signal, the first and second position detection signals being signals indicating a rotational position of a rotor in a motor, having a frequency corresponding to a rotation speed of the motor, and being opposite in phase to each other;

a second amplifier circuit configured to amplify the difference between the first position detection signal and the second position detection signal with the gain, to output a second amplification signal opposite in phase to the first amplification signal; and

a drive circuit configured to amplify the difference between the first amplification signal and the second amplification signal with a predetermined gain so as to be saturated at the power supply voltage, to output a driving voltage for driving the motor.

2. The motor drive circuit according to claim 1 , wherein

the first amplifier circuit includes:

a first current generation circuit configured to generate a first current according to the difference between the first position detection signal and the second position detection signal;

a first output current generation circuit configured to generate a first output current changing according to a current value of the first current and decreasing according to the drop in the power supply voltage; and

a first conversion circuit configured to current-voltage convert the first output current into the first amplification signal that is a voltage signal; and wherein

the second amplifier circuit includes:

a second current generation circuit configured to generate a second current opposite in phase to the first current, according to the difference between the first position detection signal and the second position detection signal;

a second output current generation circuit configured to generate a second output current changing according to a current value of the second current, decreasing according to the drop in the power supply voltage, and being opposite in phase to the first output current; and

a second conversion circuit configured to current-voltage convert the second output current into the second amplification signal that is a voltage signal.

3. The motor drive circuit according to claim 2 , wherein

the first output current generation circuit includes:

a first transistor having a control electrode thereof to be applied with a voltage corresponding to the power supply voltage;

a second transistor having a control electrode thereof to be applied with a predetermined voltage lower than the power supply voltage;

a first bias current generation circuit configured to generate a first bias current, which is the sum of a current flowing through the first transistor and a current flowing through the second transistor, and which is a current changing according to the current value of the first current; and

a first generation circuit configured to generate the first output current, on the basis of a current decreasing according to the drop in the power supply voltage out of the current flowing through the first transistor and the current flowing through the second transistor, and

the second output current generation circuit includes:

a third transistor having a control electrode thereof to be applied with a voltage corresponding to the power supply voltage;

a fourth transistor having a control electrode thereof to be applied with a predetermined voltage lower than the power supply voltage;

a second bias current generation circuit configured to generate a second bias current, which is the sum of a current flowing through the third transistor and a current flowing through the fourth transistor, and which is a current changing according to the current value of the second current; and

a second generation circuit configured to generate the second output current, on the basis of a current decreasing according to the drop in the power supply voltage out of the current flowing through the third transistor and the current flowing through the fourth transistor.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 033813 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 21, 2015
From: SYSTEM SOLUTIONS CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034816/0510 →
CHANGE OF NAME Recorded Dec 3, 2014
From: SANYO SEMICONDUCTOR CO., LTD
To: SYSTEM SOLUTIONS CO., LTD.
Reel/Frame 034537/0044 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2014
From: SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033813/0420 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2010
From: IMAI, TOSHIYUKI; IIDA, TAKAHIRO; NOIE, JOJI
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 024031/0050 →