IP Library › Granted Patent US 8,039,941
Granted Patent B2
US 8,039,941 · App. 12/423,532 · Granted Oct 18, 2011

Circuit board, lead frame, semiconductor device, and method for fabricating the same

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 8,039,941
App. No.
12/423,532
Granted
Oct 18, 2011
Kind
B2
Abstract

A semiconductor device includes: an element mounting member including a first electrode; a semiconductor element mounted on the element mounting member and including a second electrode; and an interposer element mounted on the element mounting member with a first side of the interposer element facing one of a side of the semiconductor element. The interposer element is one of a triangle and a trapezoid in plan view, and includes: a first interposer electrode electrically connected to the second electrode via a first wire; a second interposer electrode electrically connected to the first electrode; and an internal interconnection electrically connecting the first interposer electrode and the second interposer electrode to each other.

Claims (12)

1. A semiconductor device, comprising:

an element mounting member including a first electrode;

a semiconductor element mounted on the element mounting member and including a second electrode; and

an interposer element mounted on the element mounting member with a first side of the interposer element facing a side of the semiconductor element, the interposer element being one of a triangle and a trapezoid in plan view and including

a first interposer electrode electrically connected to the second electrode via a first wire,

a second interposer electrode electrically connected to the first electrode, and

an internal interconnection electrically connecting the first interposer electrode and the second interposer electrode to each other.

2. The semiconductor device of claim 1 , wherein each of the semiconductor element and the element mounting member is a quadrilateral in plan view, and

the semiconductor element has a side extending in a direction different from any of the sides of the element mounting member.

3. The semiconductor device of claim 1 , wherein the semiconductor element and the interposer element are spaced apart from each other.

4. The semiconductor device of claim 3 , wherein a distance between the semiconductor element and the interposer element is in the range from 50 μm to 4000 μm, both inclusive.

5. The semiconductor device of claim 3 , further comprising an insulating resin layer formed between the semiconductor element and the interposer element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2009
From: OCHI, TAKAO
To: PANASONIC CORPORATION
Reel/Frame 022725/0761 →
Priority Claims (2)
JP 2008-137093 · May 26, 2008 · national
JP 2009-023474 · Feb 4, 2009 · national
Continuity (1)
Related Publication 20090289347A1 · Nov 26, 2009