A/D converter-incorporated solid-state imaging device
The solid-state imaging device includes: a first node for receiving a first signal from outside the solid-state imaging device; a second node for receiving a second signal from outside the solid-state imaging device; a test signal selection circuit for outputting the first signal received at the first node and the second signal received at the second node as a test signal by switching between the first and second signals at desired timing; and a test signal input circuit for supplying the test signal from the test signal selection circuit to an input of the A/D converter.
1. A solid-state imaging device comprising:
a pixel region having a plurality of pixel cells arranged in an array, each of the pixel cells including an optoelectronic conversion element;
a pixel cell selection circuit for selecting pixel cells in the pixel region;
a plurality of vertical signal lines to which signals at pixel cells selected by the pixel cell selection circuit are read; and
an A/D converter for A/D-converting signals read to the vertical signal lines,
wherein the solid-state imaging device further comprises:
a first node for receiving a first signal inputted from outside the solid-state imaging device;
a second node for receiving a second signal inputted from outside the solid-state imaging device;
a test signal selection circuit for outputting the first signal received at the first node and the second signal received at the second node as a test signal by switching between the first signal and the second signal at desired timing; and
a test signal input circuit for supplying the test signal from the test signal selection circuit to an input of the A/D converter,
the first signal is a signal corresponding to a pixel reset signal level supplied from the pixel cells to the A/D converter via the vertical signal lines when the pixel cells are reset, and
the second signal is a signal corresponding to a pixel signal level supplied from the pixel cells to the A/D converter via the vertical signal lines when charges stored in the optoelectronic conversion elements of the pixel cells are read from the optoelectronic conversion elements.
2. The solid-state imaging device of claim 1 , wherein the test signal selection circuit outputs the first signal received at the first node as the test signal for a first time period and then outputs the second signal received at the second node as the test signal for a second time period.
3. The solid-state imaging device of claim 1 , wherein the test signal input circuit comprises:
a first switch circuit for connecting/disconnecting the vertical signal lines to/from the input of the A/D converter;
a second switch circuit for connecting/disconnecting a third node for receiving the test signal from the test signal selection circuit to/from the input of the A/D converter; and
a control circuit for controlling ON/OFF of the first and second switch circuits.
4. The solid-state imaging device of claim 3 , wherein the first switch circuit is placed in a region between the pixel region and the A/D converter.
5. The solid-state imaging device of claim 3 , wherein the second switch circuit is placed in a region between the pixel region and the A/D converter.
6. The solid-state imaging device of claim 3 , further comprising:
a fourth node connected to the input of the A/D converter,
wherein one terminal of each of the vertical signal lines is connected to a load transistor,
the first switch circuit connects/disconnects the other terminal of each of the vertical signal lines to/from the fourth node, and
the second switch circuit connects/disconnects the third node to/from the fourth node.
7. The solid-state imaging device of claim 3 , further comprising:
an analog signal processing circuit for processing signals read from pixel cells selected by the pixel cell selection circuit to the vertical signal lines,
wherein the first switch circuit connects/disconnects an output node of the analog signal processing circuit to/from the input of the A/D converter.
8. The solid-state imaging device of claim 3 , further comprising:
a sample/hold circuit placed between the pixel region and the A/D converter for holding signals read to the vertical signal lines,
wherein the first switch circuit further has a function of switching the sample/hold circuit between a sample state and a hold state.
9. The solid-state imaging device of claim 3 , wherein the A/D converter includes a plurality of A/D conversion circuits corresponding to the plurality of vertical signal lines,
the first switch circuit includes a plurality of first switches corresponding to the plurality of vertical signal lines,
each of the plurality of first switches connects/disconnects its corresponding vertical signal line to/from an input of an A/D conversion circuit corresponding to the vertical signal line,
the second switch circuit includes a plurality of second switches corresponding to the plurality of A/D conversion circuits,
each of the plurality of second switches connects/disconnects an input of its corresponding A/D conversion circuit to/from the third node, and
the control circuit controls ON/OFF of the plurality of second switches individually.
10. The solid-state imaging device of claim 3 , wherein when the A/D converter is not being tested, the third node is fixed to a given voltage value to ensure that the test signal is not supplied to the A/D converter via the second switch circuit.