IP Library › Granted Patent US 8,041,898
Granted Patent B2
US 8,041,898 · App. 12/113,268 · Granted Oct 18, 2011

Method, system and apparatus for reducing memory traffic in a distributed memory system

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 8,041,898
App. No.
12/113,268
Granted
Oct 18, 2011
Kind
B2
Abstract

The present disclosure provides a method for reducing memory traffic in a distributed memory system. The method may include storing a presence vector in a directory of a memory slice, said presence vector indicating whether a line in local memory has been cached. The method may further include protecting said memory slice from cache coherency violations via a home agent configured to transmit and receive data from said memory slice, said home agent configured to store a copy of said presence vector. The method may also include receiving a request for a block of data from at least one processing node at said home agent and comparing said presence vector with said copy of said presence vector stored in said home agent. The method may additionally include eliminating a write update operation between said home agent and said directory if said presence vector and said copy are equivalent. Of course, many alternatives, variations and modifications are possible without departing from this embodiment.

Claims (31)

1. A method for reducing memory traffic in a distributed memory system, said method comprising:

storing a presence vector in a directory of a memory slice, said presence vector indicating whether a line in local memory has been cached;

protecting said memory slice from cache coherency violations via a home agent configured to transmit and receive data from said memory slice, said home agent configured to store a copy of said presence vector;

receiving a request for a block of data from at least one socket at said home agent;

comparing said presence vector with said copy of said presence vector stored in said home agent; and

eliminating a write update operation between said home agent and said directory if said presence vector and said copy are equivalent; and

wherein the home agent includes write squashing circuitry configured to squash the write update operation.

2. The method according to claim 1 , further comprising snooping at least one local memory cache of said at least one socket based upon the contents of said directory cache.

3. The method according to claim 1 , further comprising storing a presence vector value in said directory cache.

4. The method according to claim 3 , further comprising setting a value of a dirty bit if said presence vector value changes.

5. The method according to claim 4 , further comprising updating said directory in said memory slice.

6. A system for reducing memory traffic in a distributed memory system, said system comprising:

a memory slice having a directory configured to store a presence vector, said presence vector indicating whether a line in local memory has been cached;

at least one socket configured to transmit a request for a memory line;

a home agent configured to protect said memory slice from cache coherency violations, said home agent configured to transmit and receive data from said memory slice, said home agent configured to store at least one copy of said presence vector, said home agent configured to compare said presence vector with said copy of said presence vector stored in said home agent, said home agent further configured to eliminate a write update operation between said home agent and said directory if said presence vector and said copy are equivalent; and

wherein the home agent includes write squashing circuitry configured to squash the write update operation.

7. The system according to claim 6 , wherein said home agent is further configured to snoop at least one local memory cache of said at least one socket based upon the contents of said directory cache.

8. The system according to claim 6 , wherein said presence vector value is distributed among a plurality of memory slices.

9. The system according to claim 8 , further comprising a dirty bit configured to be set to a value if said presence vector value changes.

10. The system according to claim 9 , wherein said home agent is further configured to update said directory in said memory slice if said dirty bit value is set.

11. An article comprising a storage medium having stored thereon instructions that when executed by a machine result in the following:

storing a presence vector in a directory of a memory slice, said presence vector indicating whether a line in local memory has been cached;

protecting said memory slice from cache coherency violations via a home agent configured to transmit and receive data from said memory slice, said home agent configured to store a copy of said presence vector;

receiving a request for a block of data from at least one socket at said home agent;

comparing said presence vector with said copy of said presence vector stored in said home agent; and

eliminating a write update operation between said home agent and said directory if said presence vector and said copy are equivalent; and

wherein the home agent includes write squashing circuitry configured to squash the write update operation.

12. The article according to claim 11 , further comprising snooping at least one local memory cache of said at least one socket based upon the contents of said directory cache.

13. The article according to claim 11 , further comprising storing a presence vector value in said directory cache.

14. The article according to claim 13 , further comprising setting a value of a dirty bit if said presence vector value changes.

15. The article according to claim 14 , further comprising updating said directory in said memory slice.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2009
From: MOGA, ADRIAN; AGARWAL, RAJAT; MANDVIWALLA, MALCOLM
To: INTEL CORPORATION
Reel/Frame 022367/0727 →
Continuity (1)
Related Publication 20090276581A1 · Nov 5, 2009