IP Library Granted Patent US 8,048,723
Granted Patent B2
US 8,048,723 · App. 12/329,279 · Granted Nov 1, 2011

Germanium FinFETs having dielectric punch-through stoppers

Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
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Quick Facts
Patent No.
US 8,048,723
App. No.
12/329,279
Granted
Nov 1, 2011
Kind
B2
Abstract

A method of forming a semiconductor structure includes providing a composite substrate, which includes a bulk silicon substrate and a silicon germanium (SiGe) layer over and adjoining the bulk silicon substrate. A first condensation is performed to the SiGe layer to form a condensed SiGe layer, so that the condensed SiGe layer has a substantially uniform germanium concentration. The condensed SiGe layer and a top portion of the bulk silicon substrate are etched to form a composite fin including a silicon fin and a condensed SiGe fin over the silicon fine. The method further includes oxidizing a portion of the silicon fin; and performing a second condensation to the condensed SiGe fin.

Claims (46)

1. A method of forming a semiconductor structure, the method comprising:

providing a composite substrate comprising a bulk silicon substrate and a silicon germanium (SiGe) layer over and adjoining the bulk silicon substrate;

performing a first condensation to the SiGe layer to form a condensed SiGe layer, wherein the condensed SiGe layer has a substantially uniform germanium concentration;

etching the condensed SiGe layer and a top portion of the bulk silicon substrate to form a composite fin, wherein the composite fin comprises a silicon fin and a condensed SiGe fin over the silicon fin;

oxidizing a portion of the silicon fin, wherein the step of oxidizing comprises:

filling a dielectric material to embed a bottom portion of the silicon fin therein;

forming a mask to cover a top surface and sidewalls of the condensed SiGe fin, wherein the portion of the silicon fin is exposed; and

performing an oxidation to oxidize the portion of the silicon fin and to form an oxide region; and

performing a second condensation to the condensed SiGe fin.

2. The method of claim 1 , wherein the first condensation is performed at a temperature between about 825° C. and about 880° C.

3. The method of claim 1 , wherein the second condensation is performed at a temperature between about 825° C. and about 880° C.

4. The method of claim 1 , wherein the first condensation converts substantially an entirety of the SiGe layer into the condensed SiGe layer.

5. The method of claim 1 further comprising, before the step of performing the second condensation, forming an additional dielectric material to a height substantially level with a top surface of the oxide region.

6. The method of claim 1 further comprising:

before the step of performing the second condensation, forming an oxide layer to cover the condensed SiGe fin;

after the step of performing the second condensation, removing the oxide layer and an additional oxide layer formed by the second condensation;

forming a gate dielectric over the condensed SiGe fin; and

forming a gate electrode over the gate dielectric.

7. The method of claim 1 , wherein the step of performing the second condensation to the condensed SiGe fin is performed after the step of oxidizing the portion of the silicon fin.

8. A method of forming a semiconductor structure, the method comprising:

providing a bulk silicon substrate;

epitaxially growing a silicon germanium (SiGe) layer on the bulk silicon substrate;

performing a first condensation to the SiGe layer to form a condensed SiGe layer at a temperature between about 825° C. and about 880° C.;

etching the condensed SiGe layer and a top portion of the bulk silicon substrate to form a composite fin, wherein the composite fin comprises a silicon fin and a condensed SiGe fin over the silicon fin;

oxidizing an upper portion of the silicon fin, wherein the condensed SiGe fin is not oxidized; and

performing a second condensation to the condensed SiGe fin to form a substantially pure germanium fin.

9. The method of claim 8 , wherein the first condensation is performed until an entirety of the SiGe layer is condensed and an entirety of the condensed SiGe layer has a substantially uniform atomic percentage.

10. The method of claim 8 further comprising, before the step of performing the first condensation, forming a cap layer on the SiGe layer.

11. A method of forming a semiconductor structure, the method comprising:

providing a bulk silicon substrate;

epitaxially growing a silicon germanium (SiGe) layer on the bulk silicon substrate;

performing a first condensation to the SiGe layer to form a condensed SiGe layer, wherein the first condensation is performed at an elevated temperature;

etching the condensed SiGe layer and a top portion of the bulk silicon substrate to form a recess and a composite fin in the recess, wherein the composite fin comprises a silicon fin and a condensed SiGe fin over the silicon fin;

filling a first dielectric material into the recess;

etching the first dielectric material until the condensed SiGe fin is exposed;

forming a mask to cover a top surface and sidewalls of the condensed SiGe fin;

recessing the first dielectric material to expose sidewalls of a portion of the silicon fin;

oxidizing the portion of the silicon fin to form an insulator;

filling a second dielectric material on the first dielectric material, wherein a top surface of the second dielectric material is substantially level with a top surface of the insulator; and

performing a second condensation to the condensed SiGe fin to form a substantially pure germanium fin.

12. The method of claim 11 , wherein, after the step of oxidizing the portion of the silicon fin, a lower portion of the silicon fin is not oxidized.

13. The method of claim 11 , wherein the elevated temperature comprises a temperature between about 825° C. and about 880° C.

14. The method of claim 11 , wherein the step of performing the second condensation is performed at a temperature between about 825° C. and about 880° C.

15. The method of claim 11 , wherein the insulator penetrates from one side edge of the silicon fin to an opposite side edge of the silicon fin.

16. The method of claim 11 , wherein, after the step of recessing the first dielectric material to expose the sidewalls of the portion of the silicon fin, a top surface of the first dielectric material is no higher than a bottom surface of the condensed SiGe fin.

17. The method of claim 11 , wherein the substantially pure germanium fin has a germanium atomic percentage of greater than about 90 percent.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2009
From: CHANG, CHENG-HUNG; HSU, YU-RUNG; LEE, CHEN-YI; HUNG, SHIH-TING; YEH, CHEN-NAN; YU, CHEN-HUA
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 022278/0477 →
Continuity (1)
Related Publication 20100144121A1 · Jun 10, 2010