IP Library Granted Patent US 8,051,234
Granted Patent B2
US 8,051,234 · App. 12/872,423 · Granted Nov 1, 2011

Multiprocessor system

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,051,234
App. No.
12/872,423
Granted
Nov 1, 2011
Kind
B2
Abstract

The present invention provides a technique capable of processing a plurality of interrupt causes sharing one interrupt request in different processors. An interrupt controller outputs an interrupt request when the interrupt request shared by a plurality of interrupt causes is notified. The interrupt request output by the interrupt controller is accepted by one of the processors. The processor accepting the interrupt request determines whether the interrupt cause that the processor must process has occurred, executes an interrupt processing when such interrupt cause has occurred, and notifies the generation of the interrupt request to another processor that processes another interrupt cause of the plurality of interrupt causes sharing the interrupt request when the relevant interrupt cause has not occurred.

Claims (10)

1. A method of notification of an interrupt for multi-core processor, comprising a plurality of IO circuits, an interrupt controller for receiving plural requests, one of which is shared by plural interrupt causes, the method comprising the steps of:

sending an interrupt request from one of the plurality of IO circuits to the interrupt controller,

determining one processor core based on a number identifying the interrupt request from the IO circuit by the interrupt controller,

notifying the interrupt request to the one processor core by the interrupt controller,

determining whether performing an interrupt operation for the received interrupt request based on an interrupt cause of the received interrupt request by the one processor core,

performing the interrupt operation for the received interrupt request when the one processor core determines performing the interrupt operation based on the interrupt cause,

sending the interrupt request to another processor core when the one processor core determines not performing the interrupt operation based on the interrupt cause, and

determining whether performing the interrupt operation for the received interrupt request based on the interrupt cause of the received interrupt request by the another processor core.

2. A method of notification of the interrupt for multi-core processor according to claim 1 , further comprising an interrupt information table, the interrupt controller and each processor core determines which processor core to be notified the interrupt request based on the interrupt information table.

3. A method of notification of the interrupt for multi-core processor according to claim 2 , wherein the interrupt information table contains priority information for each interrupt causes regarding to each processor cores.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Mar 11, 2011
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025962/0877 →
Priority Claims (1)
JP 2007-006621 · Jan 16, 2007 · national
Continuity (2)
Continuation 12007838 · Jan 16, 2008
Related Publication 20110022759A1 · Jan 27, 2011