Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean
A ferroelectric memory device is fabricated while mitigating edge degradation. A bottom electrode is formed over one or more semiconductor layers. A ferroelectric layer is formed over the bottom electrode. A top electrode is formed over the ferroelectric layer. The top electrode, the ferroelectric layer, and the bottom electrode are patterned or etched. A dry clean is performed that mitigates edge degradation. A wet etch/clean is then performed.
1. A method of fabricating a ferroelectric memory device, the method comprising:
forming a bottom electrode over one or more semiconductor layers;
forming a ferroelectric layer over the bottom electrode;
forming a top electrode over the ferroelectric layer;
selectively etching the top electrode;
selectively etching the ferroelectric layer;
performing a dry clean process subsequent to etching the ferroelectric layer with a plasma that generates isotropic fluoride species that react with debris to form residual reaction products; and
selectively etching the bottom electrode subsequent to performing the dry clean process.
2. The method of claim 1 , further comprising performing a wet clean process with phosphoric acid to remove the residual reaction products subsequent to performing the dry clean process.
3. The method of claim 1 , further comprising forming a bottom electrode diffusion barrier layer over one or more semiconductor layers prior to forming the bottom electrode.
4. The method of claim 1 , further comprising forming a hard mask on the top electrode covering a target portion of the top electrode prior to etching the top electrode.
5. The method of claim 1 , further comprising performing a second dry clean subsequent to selectively etching the bottom electrode diffusion barrier layer.
6. The method of claim 1 , wherein the plasma is comprised of CF 4 /O 2 .
7. The method of claim 1 , wherein the plasma is comprised of CF 4 /O 2 /Ar.