Semiconductor device and method of fabricating the same

1. A method for fabricating a semiconductor device, the method comprising:

forming a first interlayer insulation layer and a second interlayer insulation layer;

forming a first storage node contact plug that penetrates said first interlayer insulation layer and a second storage node contact plug that penetrates said second interlayer insulation layer;

forming a separation insulation layer over the second interlayer insulation layer;

performing a main etch process to form an open region by selectively etching the separation insulation layer, the open region exposing a top surface of the second storage node contact plug;

performing an over-etch process to expand the open region by etching the second storage node contact plug and the second interlayer insulation layer, thereby a bottom portion of the expanded open region extending laterally beyond side surfaces of the second storage node contact plug after the performance of the over-etch process;

forming a storage node in the expanded open region; and

removing the separation insulation layer,

wherein the first interlayer insulation layer and the separation insulation layer comprise an oxide layer and the second interlayer insulation layer comprises a nitride layer.

2. The method of claim 1 , wherein the forming of the first and second storage node contact plugs comprises:

forming the first interlayer insulation layer including the first storage node contact plug;

recessing the first interlayer insulation layer to partially protrude the first storage node contact plug above the first interlayer insulation layer;

forming the second interlayer insulation layer to cover the first storage node contact plug protruding above the first interlayer insulation layer;

forming a contact hole to partially expose the first storage node contact plug by selectively etching the second interlayer insulation layer; and

forming the second storage node contact plug by filling the contact hole with a conductive layer.

3. The method of claim 1 , wherein a thickness of the second interlayer insulation layer is less than a thickness of the first interlayer insulation layer.

4. The method of claim 2 , wherein the second storage node contact plug has a zigzag structure and overlaps the first storage node contact plug by a predetermined region.

5. The method of claim 2 , wherein the first storage node contact plug and the second storage node contact plug are formed of the same material.

6. The method of claim 5 , wherein the first storage node contact plug and the second storage node contact plug comprise a polysilicon layer.

7. The method of claim 2 , wherein an etch depth etched during the performing of the over-etch process is less than a thickness of the second interlayer insulation layer.

8. The method of claim 1 , wherein the main etch process and the over-etch process are performed in-situ.

9. The method of claim 1 , wherein each of the first and second storage node contact plugs includes any one selected from the group consisting of titanium nitride (TiN), tantalum nitride (TaN), hafnium nitride (HfN), ruthenium (Ru), ruthenium oxide (RuO 2 ), platinum (Pt), iridium (Ir), and iridium oxide (IrO 2 ), or a stack layer thereof.

10. The method of claim 1 , further comprising forming an ohmic contact layer between the second storage node contact plug and the storage node.

11. The method of claim 10 , wherein the ohmic contact layer comprises metal silicide.

12. A method for fabricating a capacitor of a semiconductor device, the method comprising:

forming a first interlayer insulation layer including a first storage node contact plug;

partially protruding the first storage node contact plug above the first interlayer insulation layer by recessing the first interlayer insulation layer;

forming a second interlayer insulation layer over the first interlayer insulation layer to cover the protruding first storage node contact plug;

forming a contact hole to expose the first storage node contact plug by selectively etching the second interlayer insulation layer;

forming a second storage node contact plug by filling the contact hole with a conductive layer;

forming a separation insulation layer over the second interlayer insulation layer including the second storage node contact plug;

forming an open region by selectively etching the separation insulation layer, the second interlayer insulation layer, and the second storage node contact plug, thereby a bottom portion of the open region extending laterally beyond side surfaces of the second storage node contact plug;

forming a storage node in the open region; and

removing the separation insulation layer,

wherein the first interlayer insulation layer and the separation insulation layer comprise an oxide layer and the second interlayer insulation layer comprises a nitride layer.

13. The method of claim 12 , wherein the forming of the open region comprises:

performing a main etch process to form an open region by selectively etching the separation insulation layer, the open region exposing a top surface of the second storage node contact plug; and

performing an over-etch process to expand the open region by partially etching the second storage contact plug and the second interlayer insulation layer at a bottom of the open region.

14. The method of claim 13 , wherein an etch depth etched during the over-etch process is less than a thickness of the second interlayer insulation layer.