Solar cell and manufacturing method of the solar cell
A p type amorphous silicon layer is stacked, by a CVD method, on a main surface of an n type single-crystalline silicon substrate; an n type amorphous silicon layer is stacked, by the CVD method, on a surface opposite to the surface on which the p type amorphous silicon layer is stacked; and, by using a laser ablation processing method, through-holes are formed in the n type single-crystalline silicon substrate, the p type amorphous silicon layer, and the n type amorphous silicon layer. Subsequently, an insulating layer is formed on an inner wall surface of each of the through-holes, and then a conductive material is filled therein.
1. A solar cell comprising:
a semiconductor substrate;
a first amorphous semiconductor layer of a first conductivity type, the layer formed on a first main surface of the semiconductor substrate;
a second amorphous semiconductor layer of a second conductivity type, the layer formed on a second main surface of the semiconductor substrate;
a plurality of through-holes which penetrate the first amorphous semiconductor layer, the semiconductor substrate, and the second amorphous semiconductor layer;
an insulating layer which is formed continuously on an inner wall of each of the plurality of through-holes and on the second amorphous semiconductor layer;
a plurality of line-shaped electrodes which are formed on a surface of the first amorphous semiconductor layer;
a plurality of conductive layers which are formed in each of the plurality of through-holes, and which are electrically connected to one or more of the plurality of line-shaped electrodes;
a first extracting electrode which is formed on the second amorphous semiconductor layer with the insulating layer in between, and which is electrically connected to the plurality of conductive layers; and
a second extracting electrode which is formed on the second amorphous semiconductor layer.
2. A manufacturing method of a solar cell including a semiconductor substrate having a first main surface and a second main surface that is provided opposite to the first main surface, the manufacturing method comprising the steps of:
(A) forming a first amorphous semiconductor layer of a first conductivity type, on the first main surface of the semiconductor substrate;
(B) forming a second amorphous semiconductor layer of a second conductivity type, on the second main surface of the semiconductor substrate;
(C) forming a plurality of through-holes penetrating the first amorphous semiconductor layer, the semiconductor substrate, and the second amorphous semiconductor layer;
(D) forming an insulating layer extending continuously on an inner wall of each of the plurality of through-holes and on the second amorphous semiconductor layer;
(E) forming a plurality of line-shaped electrodes on the first amorphous semiconductor layer;
(F) forming a plurality of conductive layers in each of the plurality of through-holes;
(G) forming a first extracting electrode on the second amorphous semiconductor layer with the insulating layer in between; and
(H) forming a second extracting electrode on a surface of the second amorphous semiconductor layer,
wherein the plurality of conductive layers are electrically connected to one or more of the plurality of line-shaped electrodes in the step (F), and
the first extracting electrode is electrically connected to the plurality of conductive layers in the step (G).