IP Library › Granted Patent US 8,062,928
Granted Patent B2
US 8,062,928 · App. 12/852,653 · Granted Nov 22, 2011

Semiconductor device having a semiconductor chip, and method for the production thereof

Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 8,062,928
App. No.
12/852,653
Granted
Nov 22, 2011
Kind
B2
Abstract

A semiconductor device having a semiconductor chip having an active surface with flip-chip contacts and a passive surface is disclosed. In one embodiment, the flip-chip contacts are surrounded by an electrically insulating layer as underfill material, the layer having a UV B-stageable material. The UV B-stageable material is applied on the active surface of the semiconductor wafer.

Claims (39)

1. A method for producing a semiconductor device, comprising:

providing a semiconductor wafer with contact areas on an active surface including flip-chip contacts;

applying a UV B-stageable material as an electrically insulating layer on the active surface such that a portion of the flip-chip contacts remain exposed;

applying a patterned mask on the active surface of the semiconductor wafer;

exposing the mask by means of UV radiation, so that the flip-chip contacts are not exposed and at least the surface of the exposed regions is brought to a cured intermediate state;

removing the unexposed regions of the layer while leaving free at least a tip of the flip-chip contacts;

providing a rewiring substrate having a top side and an underside opposed to the top side, with internal contact areas on the top side and external contact areas on the underside;

applying the semiconductor wafer on the top side of the rewiring substrate so that the flip-chip contacts touch the internal contacts; and

performing a heat treatment to produce electrical connections between the flip-chip contacts and the internal contact areas and cure the UV B-stage material.

2. The method according to claim 1 , wherein the semiconductor wafer has a passive surface opposing the active surface and planar side edges extending between the active surface and the passive surface, and wherein the electrically insulating material layer extends across the active surface and has edges coplanar with and not extending beyond the planar side edges.

3. The method according to claim 1 , comprising evaporating solvent after the application of the electrically insulating layer.

4. The method according to claim 1 , comprising:

testing the functionality of semiconductor devices in the semiconductor device positions via the external contact areas; and

separating the wafer into individual semiconductor devices.

5. The method according to claim 1 , comprising applying the electrically insulating layer by spin-coating, dispensing, spraying on, jet printing methods, stencil printing methods or dipping methods.

6. A method for producing a semiconductor device, comprising:

providing a semiconductor wafer with contact areas on an active surface including flip-chip contacts, the semiconductor wafer having semiconductor device positions for semiconductor devices;

applying a UV B-stageable material as an electrically insulating layer on the active surface such that a portion of the flip-chip contacts remain exposed;

applying a patterned mask on the active surface of the semiconductor wafer;

exposing the mask by means of UV radiation, so that the flip-chip contacts are not exposed and at least the surface of the exposed regions is brought to a cured intermediate state; and

removing the unexposed regions of the layer while leaving free at least a tip of the flip-chip contacts.

7. The method according to claim 6 , wherein the semiconductor wafer has a passive surface opposing the active surface and planar side edges extending between the active surface and the passive surface, and wherein the electrically insulating material layer extends across the active surface and has edges coplanar with and not extending beyond the planar side edges.

8. The method according to claim 6 , comprising evaporating solvent after the application of the electrically insulating layer.

9. The method according to claim 6 , comprising applying the electrically insulating layer by spin-coating, dispensing, spraying on, jet printing methods, stencil printing methods or dipping methods.

10. The method according to claim 6 , comprising separating the semiconductor wafer into individual semiconductor devices.

11. The method according to claim 6 , comprising testing the functionality of the semiconductor devices in the semiconductor device positions via the flip-chip contact tips.

12. A method for producing a semiconductor device, comprising:

providing a semiconductor wafer having an active surface with flip-chip contacts, an opposing passive surface, and planar side edges extending between the active surface and the passive surface;

applying a UV B-stageable material as an electrically insulating layer surrounding the flip-chip contacts as underfill material such that a portion of the flip-chip contacts remain exposed, and such that the electrically insulating material layer extends across the active surface and has edges coplanar with and not extending beyond the planar side edges;

applying a patterned mask on the active surface of the semiconductor wafer;

exposing the mask by means of UV radiation, so that the flip-chip contacts are not exposed and at least the surface of the exposed regions is brought to a cured intermediate state; and

removing the unexposed regions of the layer while leaving free at least a tip of the flip-chip contacts.

13. The method according to claim 12 , comprising:

providing a rewiring substrate having a top side and an underside opposed to the top side, with internal contact areas on the top side and external contact areas on the underside;

applying the semiconductor wafer on the top side of the rewiring substrate so that the flip-chip contacts touch the internal contacts; and

performing a heat treatment to produce electrical connections between the flip-chip contacts and the internal contact areas and cure the UV B-stage material.

14. The method according to claim 12 , comprising evaporating solvent after the application of the electrically insulating layer.

15. The method according to claim 12 , comprising applying the electrically insulating layer by spin-coating, dispensing, spraying on, jet printing methods, stencil printing methods or dipping methods.

16. The method according to claim 12 , comprising separating the semiconductor wafer into individual semiconductor devices.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2010
From: BAUER, MICHAEL; FUERGUT, EDWARD
To: INFINEON TECHNOLOGIES AG
Reel/Frame 024807/0525 →
Priority Claims (1)
DE 10 2005 046 280 · Sep 27, 2005 · national
Continuity (2)
Division 11535780 · Sep 27, 2006
Related Publication 20100297792A1 · Nov 25, 2010