IP Library › Granted Patent US 8,063,692
Granted Patent B2
US 8,063,692 · App. 12/813,360 · Granted Nov 22, 2011

Semiconductor integrated circuit

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 8,063,692
App. No.
12/813,360
Granted
Nov 22, 2011
Kind
B2
Abstract

A semiconductor integrated circuit includes: an internal circuit; a detecting circuit which detects an element characteristic of the internal circuit; a calculating circuit which calculates a first consumption energy consumed when a power gating operation is performed on a task processed by the internal circuit and a second consumption energy consumed when an operation of reducing a voltage and a frequency is performed in accordance with the element characteristic; and a switching circuit which performs the power gating operation on the internal circuit when the first consumption energy is smaller than the second consumption energy and performs the operation of reducing a voltage and a frequency when the second consumption energy is smaller than the first consumption energy.

Claims (35)

1. A semiconductor integrated circuit comprising:

an internal circuit;

a detecting circuit which detects an element characteristic of the internal circuit;

a calculating circuit which calculates a first consumption energy consumed when a power gating operation is performed on a task processed by the internal circuit and a second consumption energy consumed when an operation of reducing a voltage and a frequency is performed in accordance with the element characteristic; and

a switching circuit which performs the power gating operation on the internal circuit when the first consumption energy is smaller than the second consumption energy and performs the operation of reducing a voltage and a frequency when the second consumption energy is smaller than the first consumption energy.

2. The semiconductor integrated circuit according to claim 1 ,

wherein the switching circuit comprises a switch which disconnects the internal circuit from a first power source when operation of the internal circuit is terminated.

3. The semiconductor integrated circuit according to claim 2 ,

wherein the switching circuit further comprises;

a control circuit which outputs a first control signal when the operation of the internal circuit is terminated and outputs a second control signal after a predetermined period of time has elapsed, and

a switch changing circuit which outputs a third control signal for changing a logic in accordance with the first control signal and the second control signal to the switch.

4. The semiconductor integrated circuit according to claim 1 ,

wherein the switching circuit further comprises;

a power-source controlling circuit which reduces a power-supply voltage of a second power source, and

a clock generating circuit which reduces a frequency of a clock signal to be supplied to the internal circuit.

5. The semiconductor integrated circuit according to claim 1 ,

wherein the detecting circuit detects the element characteristic derived from a temperature condition of the internal circuit.

6. The semiconductor integrated circuit according to claim 1 ,

wherein the detecting circuit detects the element characteristic derived from a fabrication condition of the internal circuit.

7. The semiconductor integrated circuit according to claim 1 ,

wherein the detecting circuit detects the element characteristic derived from a fabrication condition and a temperature condition of the internal circuit.

8. The semiconductor integrated circuit according claim 1 ,

wherein the element characteristic detected by the detecting circuit is an oscillation frequency of a ring oscillator including an odd number of inverters.

9. The semiconductor integrated circuit according to claim 8 ,

wherein the calculating circuit stores the relationship between the oscillation frequency and a current leakage amount obtained by MOS transistors included in the inverters and calculates the first and second consumption energies in accordance with the current leakage amount.

10. The semiconductor integrated circuit according to claim 1 ,

wherein the element characteristic detected by the detecting circuit is a current leakage characteristic of the internal circuit.

11. The semiconductor integrated circuit according to claim 1 ,

wherein the detecting circuit comprises;

a capacitor having a first terminal connected to a low potential power source,

a P-type MOS transistor having a drain terminal connected to a second terminal of the capacitor, a source terminal connected to a high potential power source, and a gate terminal which receives a first signal,

an N-type MOS transistor having a drain terminal connected to the second terminal of the capacitor and a source terminal and a gate terminal which are connected to the low potential power source, and

a clock counter which starts counting of a clock when receiving a clock signal and the first signal and which stops the counting of the clock when a voltage of the capacitor has reached a predetermined voltage.

12. The semiconductor integrated circuit according to claim 11 ,

wherein the calculating circuit calculates a current leakage amount of the N-type MOS transistor in accordance with a count value obtained from the clock counter and calculates the first and second consumption energies in accordance with the current leakage amount.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 11, 2010
From: OKANO, HIROSHI
To: FUJITSU LIMITED
Reel/Frame 024525/0514 →
Continuity (2)
Continuation PCTJP2007074144 · Dec 14, 2007
Related Publication 20100244942A1 · Sep 30, 2010