Semiconductor integrated circuit for minimizing a deviation of an internal power supply from a desired value
A semiconductor integrated circuit includes an external terminal input with an external power supply voltage, a plurality of field effect transistors connected between the external terminal and an internal power supply line and a control circuit input with potentials of spots where voltage drops from output points of the output transistors are substantially the same in the internal power supply line, and controlling the plurality of field effect transistors according to the potential being input.
1. A semiconductor integrated circuit comprising:
an external terminal input with an external power supply voltage;
a plurality of field effect transistors connected between the external terminal and an internal power supply line; and
a control circuit input with potentials of spots where voltage drops from output points of the plurality of field effect transistors are substantially a same in the internal power supply line, and controlling the plurality of field effect transistors according to the potential being input.
2. The semiconductor integrated circuit according to claim 1 , wherein the internal power supply line is formed in a mesh.
3. The semiconductor integrated circuit according to claim 1 , wherein the field effect transistors are N type transistors.
4. The semiconductor integrated circuit according to claim 1 , wherein the field effect transistors are P type transistors.
5. The semiconductor integrated circuit according to claim 1 , wherein the control circuit compares the potentials of the spots where voltage drops from the output points of the plurality of field effect transistors are substantially the same with a reference potential, and outputs a voltage for controlling the plurality of field effect transistors according to a result of the comparison.
6. The semiconductor integrated circuit according to the claim 1 ,
wherein the plurality of field effect transistors are of the same size, and
values of wiring resistances of the internal power supply line between the spot of the internal power supply line which are connected to the control circuit and the output points of the plurality of field effect transistors are substantially the same with each other.
7. The semiconductor integrated circuit according to claim 1 , wherein the plurality of field effect transistors comprise:
a first field effect transistor having a first current flowing therein;
a second field effect transistor having a second current flowing therein,
wherein in the spots voltage drops from the output points of the plurality of field effect transistors are substantially the same, a value multiplying a resistance value of the internal power supply line from an output points of the first field effect transistor to the spots with a value of the first current is substantially the same as a value multiplying a resistance value of the internal power supply line from an output points of the second field effect transistor to the spots with a value of the second current.
8. The semiconductor integrated circuit according to claim 1 , further comprising a plurality of the external terminals,
wherein the plurality of field effect transistors are connected to at least one of the plurality of external terminals.
9. The semiconductor integrated circuit according to claim 8 , further comprising an external power supply line for connecting the external terminal and the plurality of field effect transistors,
wherein a resistance value from the external terminal to the plurality of field effect transistors are substantially the same.
10. A semiconductor integrated circuit comprising:
an external terminal applied with an external power supply voltage;
a plurality of field effect transistors each connected between the external terminal and a plurality of internal power supply lines;
a monitor line connected with the plurality of internal power supply transistors; and
a control circuit input with a plurality of potentials of nodes between the plurality of internal power lines and the monitor line through the monitor line, for outputting a voltage for controlling the plurality of field effect transistors according to the potential of the node being input,
wherein potential differences between a potential of output points of the plurality of field effect transistors and the potential of the nodes are substantially the same.
11. The semiconductor integrated circuit according to claim 10 , wherein the internal power supply line is formed in a mesh.
12. The semiconductor integrated circuit according to claim 10 , wherein the field effect transistors are N type transistors.
13. The semiconductor integrated circuit according to claim 10 , wherein the field effect transistors are P type transistors.
14. The semiconductor integrated circuit according to claim 10 , wherein the control circuit compares the potential of the node being input with a reference potential, and outputs a voltage for controlling the plurality of field effect transistors according to a result of the comparison.
15. The semiconductor integrated circuit according to the claim 10 ,
wherein the plurality of field effect transistors are of the same size, and
values of wiring resistances of the internal power supply line between the nodes and the output points of the plurality of field effect transistors are substantially the same with each other.
16. The semiconductor integrated circuit according to claim 10 , wherein the plurality of field effect transistors comprise:
a first field effect transistor having a first current flowing therein;
a second field effect transistor having a second current flowing therein,
wherein the spots voltage drops from the output points of the plurality of field effect transistors are substantially same, a value multiplying a resistance value of the internal power supply line from an output points of the first field of transistor to the spots with a value of the first current is substantially the same as a value multiplying a resistance value of the internal power supply line from an output points of the second field effect transistor to the spots with a value of the second current.
17. The semiconductor integrated circuit according to claim 10 , further comprising a plurality of the external terminals,
wherein the plurality of field effect transistors are connected to at least one of the plurality of external terminals.
18. The semiconductor integrated circuit according to claim 14 , further comprising an external power supply line for connecting the external terminal and the plurality of field effect transistors,
wherein a resistance value from the external terminal to the plurality of field effect transistors are substantially the same.
19. The semiconductor integrated circuit according to claim 1 , wherein the control circuit compares the potentials of the spots where voltage drops from the output points of the plurality of field effect transistors are substantially the same with a reference potential, and outputs a voltage for controlling the plurality of field effect transistors according to a result of the comparison.