IP Library Granted Patent US 8,072,158
Granted Patent B2
US 8,072,158 · App. 12/410,846 · Granted Dec 6, 2011

Dimming interface for power line

Assignee: General Electric Company
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Quick Facts
Patent No.
US 8,072,158
App. No.
12/410,846
Granted
Dec 6, 2011
Kind
B2
Abstract

An interface circuit for a lamp ballast includes first and second input power lines, L 1 and L 2 , with first and second respective switches, and a neutral power line N, all coupled to a diode bridge. Closing one of the first or second input power lines L 1 or L 2 causes a photodiode in an opto-isolator coupled to the diode bridge to turn ON, which in turn causes a MOSFET in a control circuit to be in an open state. When in the open state, a first resistor coupled to the source of the MOSFET is included in the control circuit and causes a lamp attached thereto to operate in a dimmed state. When both input power line switches are closed, L 1 and L 2 are both coupled to the diode bridge and thereby cause the phototransistor to be in an OFF state, which causes the MOSFET to close, thereby including a second resistor, coupled to the drain of the MOSFET, in the control circuit in parallel with the first resistor. This in turn causes the lamp to operate at full intensity.

Claims (36)

1. A dimming interface circuit, comprising:

a first input power line L 1 with a first switch;

a second input power line L 2 with a second switch;

a neutral input power line N,

a diode bridge:

to which the first input power line is coupled via the first switch;

to which the second input power line is coupled via the second switch; and

to which the neutral power line is directly coupled; and

a phototransistor that is in an OFF state when the first and second switches are closed so that the first and second input lines are connected to the diode bridge, and is in an ON state when only one of the first and second switches are closed.

2. The interface circuit as set forth in claim 1 , coupled to a control circuit that includes a first resistor and a second resistor, coupled to a gate, wherein the gate is open when the phototransistor is in an ON state, causing at least one lamp coupled to the control circuit to be in dimmed state, and wherein the gate is closed when the phototransistor is in an OFF state, causing the at least one lamp to be in a full-intensity state.

3. The interface circuit as set forth in claim 2 , wherein the gate is a MOSFET.

4. The interface circuit as set forth in claim 3 , wherein closing one of the first switch and the second switch causes the phototransistor to enter the ON state.

5. The interface circuit as set forth in claim 3 , wherein closing both of the first switch and the second switch causes the phototransistor to enter the OFF state.

6. The interface circuit as set forth in claim 2 , wherein the second resistor is excluded from the control circuit when the gate is open.

7. The interface circuit as set forth in claim 1 , wherein the second resistor is included the control circuit, in parallel with the first resistor when the gate is closed.

8. The interface circuit as set forth in claim 1 , wherein the phototransistor is included in an opto-isolator.

9. The interface circuit as set forth in claim 8 , wherein the diode bridge includes a first bus that is coupled to first and second diodes, to the first input power line L 1 , and to the opto-isolator via a resistor.

10. The interface circuit as set forth in claim 9 , wherein the diode bridge includes a second bus that is coupled to third and fourth diodes, to the second input power line L 2 , and to the opto-isolator via a capacitor.

11. The interface circuit as set forth in claim 10 , wherein the diode bridge includes a third bus that is coupled to fifth and sixth diodes, and to the neutral power line N.

12. A control circuit for a dimming interface circuit for controlling an electric device, comprising:

a MOSFET that has a source coupled to a first resistor, a first capacitor, and a switch S 2 , and a drain coupled to a second resistor;

wherein the second resistor is excluded from the circuit when the MOSFET is open;

wherein the second resistor is included in the circuit, in parallel with the first resistor, when the MOSFET is closed;

wherein the control circuit is coupled to an interface circuit with a phototransistor, wherein the MOSFET is open when the phototransistor is in an ON state, and wherein the MOSFET is closed when the phototransistor is in an OFF state; and

wherein the phototransistor is included in an opto-isolator that is coupled to a diode bridge and to the control circuit.

13. The control circuit as set forth in claim 12 , wherein the diode bridge comprises:

a first bus that is coupled to first and second diodes, to a first input power line L 1 , and to the opto-isolator via a resistor;

a second bus that is coupled to third and fourth diodes, to a second input power line L 2 , and to the opto-isolator via a capacitor; and

a third bus that is coupled to fifth and sixth diodes, and to a neutral power line N.

14. The control circuit as set forth in claim 13 , wherein the first and second input power lines are coupled to a power source by first and second switches, respectively, and wherein the phototransistor is in the ON state when one of the first and seconds switches is closed and in the OFF state when both of the first and second switches are closed.

15. A method of dimming one or more lamps, comprising:

providing first and second switchable input power lines L 1 and L 2 , and a neutral power line N;

closing one of the switchable input power lines L 1 or L 2 to cause a phototransistor in an interface circuit to turn ON, which causes a MOSFET in a control circuit to be in an open state during which at least one lamp coupled to the control circuit is in a dimmed state; and

closing both of the switchable input power lines L 1 and L 2 to cause a phototransistor to turn OFF, which causes the MOSFET to be in a closed state during which the at least one lamp is in a full-intensity state.

16. The method according to claim 15 , wherein closing the MOSFET causes a second resistor to be included in the control circuit in a parallel configuration with a first resistor, thereby reducing resistance in the control circuit and permitting the at least one lamp to operate at full intensity.

17. The method according to claim 16 , further including coupling one or more non-dimming ballast circuits input power lines L 1 and L 2 , and to the input neutral power line N.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2009
From: NERONE, LOUIS ROBERT
To: GENERAL ELECTRIC COMPANY
Reel/Frame 022448/0505 →
Continuity (1)
Related Publication 20100244730A1 · Sep 30, 2010