IP Library Granted Patent US 8,085,084
Granted Patent B2
US 8,085,084 · App. 12/628,054 · Granted Dec 27, 2011

System for substrate potential regulation during power-up in integrated circuits

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,085,084
App. No.
12/628,054
Granted
Dec 27, 2011
Kind
B2
Abstract

An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.

Claims (40)

1. A method comprising:

accessing a first bias potential;

accessing a second bias potential; and

based on a voltage value of said first bias potential, coupling one of said first bias potential and said second bias potential to a substrate of an integrated circuit.

2. The method of claim 1 , wherein said first bias potential comprises a substrate bias.

3. The method of claim 1 , wherein said second bias potential comprises a ground.

4. The method of claim 1 , wherein said coupling comprises:

coupling said second bias potential to said substrate if said voltage value of said first bias potential is off.

5. The method of claim 4 , wherein said coupling further comprises:

coupling said first bias potential to said substrate if said voltage value of said first bias potential is on.

6. A method comprising:

accessing a first bias potential;

accessing a second bias potential;

accessing a third bias potential; and

based on voltage values of said first bias potential and said third bias potential, coupling one of said first bias potential and said second bias potential to a substrate of an integrated circuit.

7. The method of claim 6 , wherein said first bias potential comprises a substrate bias.

8. The method of claim 6 , wherein said second bias potential comprises a ground.

9. The method of claim 6 , wherein said third bias potential comprises a well bias.

10. The method of claim 6 , wherein said coupling comprises:

coupling said second bias potential to said substrate if said voltage value of said first bias potential is off and if said voltage value of said third bias potential is on.

11. The method of claim 10 , wherein said coupling comprises:

coupling said first bias potential to said substrate if said voltage value of said first bias potential is on and if said voltage value of said third bias potential is on.

12. The method of claim 6 , wherein said coupling comprises:

coupling said first bias potential to said substrate if said voltage value of said first bias potential is on and if said voltage value of said third bias potential is off.

13. The method of claim 6 , wherein said coupling comprises:

coupling said second bias potential to said substrate if said voltage value of said first bias potential is on and if said voltage value of said third bias potential is off.

14. A method comprising:

accessing a charge pump enable line;

accessing a first bias potential;

coupling a charge pump output to a substrate of an integrated circuit; and

based on a voltage value of said charge pump enable line, allowing a connection between said first bias potential and said substrate.

15. The method of claim 14 , wherein said first bias potential comprises a ground.

16. The method of claim 14 , wherein said substrate comprises a P-type substrate.

17. The method of claim 14 , wherein said allowing comprises:

allowing said connection between said first bias potential and said substrate if said voltage value of said charge pump enable line is off.

18. The method of claim 14 , further comprising:

accessing a second bias potential.

19. The method of claim 18 , wherein said second bias potential comprises a well bias.

20. The method of claim 18 , further comprising:

based on voltage values of said charge pump enable line and said second bias potential, allowing said connection between said first bias potential and said substrate.

Assignments (8)
CHANGE OF NAME Recorded Mar 4, 2022
From: FACEBOOK, INC.
To: META PLATFORMS, INC.
Reel/Frame 059320/0484 →
MERGER Recorded Feb 21, 2022
From: TRANSMETA CORPORATION
To: TRANSMETA LLC
Reel/Frame 059056/0741 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2022
From: TRANSMETA LLC
To: INTELLECTUAL VENTURE FUNDING LLC
Reel/Frame 059203/0521 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2022
From: FU, ROBERT; CHEN, TIEN-MIN
To: TRANSMETA CORPORATION
Reel/Frame 059056/0376 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2019
From: INTELLECTUAL VENTURES ASSETS 88 LLC
To: FACEBOOK, INC.
Reel/Frame 048136/0179 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2018
From: INTELLECTUAL VENTURES HOLDING 81 LLC
To: INTELLECTUAL VENTURES ASSETS 88 LLC
Reel/Frame 047014/0629 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 036711 FRAME: 0160. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 6, 2015
From: INTELLECTUAL VENTURES FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036797/0356 →
MERGER Recorded Sep 29, 2015
From: INTELLECTUAL VENTURE FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036711/0160 →
Continuity (2)
Continuation 10712523 · Nov 12, 2003
Related Publication 20100073076A1 · Mar 25, 2010