IP Library Granted Patent US 8,085,779
Granted Patent B2
US 8,085,779 · App. 12/613,403 · Granted Dec 27, 2011

Systems for supporting packet processing operations

Assignee: Extreme Networks, Inc.
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Quick Facts
Patent No.
US 8,085,779
App. No.
12/613,403
Filed
Nov 5, 2009
Granted
Dec 27, 2011
Kind
B2
Art Unit
2465
USPC
370/392
Abstract

Several systems for supporting packet processing are described. A first system supports virtual routing of a packet. A second system supports de-multiplexing of a packet. A third system supports advanced MPLS label processing of a packet.

Claims (40)

1. A system comprising:

a receive interface to receive a packet comprising at least a destination address, a payload, and a key indicating a desired class of service for the packet selected from a plurality of possible classes of service;

key deriving logic for deriving the key indicating the desired class of service for the packet from the plurality of possible classes of service selected from the group comprising uni-cast routing, multi-cast routing, and bridging;

starting address logic for providing a starting address of a program sequence for processing the packet responsive to the key, the starting address selected from a plurality of possible starting addresses, each associated with a different class of service from among the plurality of possible classes of service, wherein the starting address logic is a content addressable memory (CAM) holding a plurality of entries, each having a tag portion and a content portion indicating the starting address of a program sequence for a desired class of service, wherein the CAM is configured to search for an entry having a tag portion matching the key and a content portion indicating the starting address for a program sequence corresponding to the desired class of service indicated by the key, and, when a match is found, outputting the content portion of the matching entry and a signal indicating a hit condition, and, when a match is not found, outputting a signal indicating a miss condition;

a memory for holding a plurality of program sequences corresponding to the possible starting addresses; and

execution logic for executing the program sequence corresponding to the starting address provided by the starting address logic.

2. The system of claim 1 wherein the starting address logic is a lookup table holding a plurality of addressable entries, each indicating the starting address of a program sequence for a desired class of service, wherein the lookup table is configured to access an entry in the table addressed by the key and indicating the starting address for a program sequence corresponding to the desired class of service indicated by the key, and output the starting address indicated by the entry.

3. A method comprising:

receiving a packet comprising at least a destination address, a payload, and a key indicating a desired class of service for the packet selected from a plurality of possible classes of service;

deriving a key indicating the desired class of service for the packet from the plurality of possible classes of service selected from the group comprising uni-cast routing, multi-cast routing, and bridging;

providing a starting address of a program sequence for the packet responsive to the key, the starting address selected from a plurality of possible starting addresses, each associated with a different class of service from among the plurality of possible classes of service, wherein providing the starting address of the program sequence comprises searching through a plurality of entries, each having a tag portion and a content portion indicating the starting address of a program sequence for a desired class of service, for an entry having a tag portion matching the key and a content portion indicating the starting address for a program sequence corresponding to the desired class of service indicated by the key, and, if a match is found, outputting the content portion of the matching entry and a signal indicating a hit condition, and, if a match is not found, outputting a signal indicating a miss condition;

holding a plurality of program sequences corresponding to the plurality of possible starting addresses; and

executing the program sequence corresponding to the provided starting address.

4. The method of claim 3 wherein providing the starting address of the program sequence comprises addressing a plurality of addressable entries, each indicating the starting address of a program sequence for a desired class of service, to access an entry addressed by the key and indicating the starting address for a program sequence corresponding to the desired class of service indicated by the key, and outputting the starting address indicated by the addressed entry.

5. A packet processing system comprising:

a memory to store logic;

a Content Addressable Memory (CAM) to store a plurality of program sequences;

a processor to execute the logic and one or more of the plurality of the program sequences;

a receive interface to receive a packet comprising at least a destination address, a payload, and a key indicating a desired class of service for the packet selected from a plurality of possible classes of service;

wherein the logic comprises:

key deriving logic to derive the key indicating the desired class of service for the packet from the plurality of possible classes of service;

searching logic to search a plurality of entries, each having a tag portion and a content portion, for an entry having a tag portion that matches the key, the searching logic to further output the content portion of a matching entry and an indicator of a hit condition when the matching entry is found, and output an indicator of a miss condition when the matching entry is not found;

starting address logic to provide a starting address of one of the plurality of program sequence in the CAM for processing the packet responsive to the key, the starting address selected from a plurality of possible starting addresses, each associated with a different class of service from among the plurality of possible classes of service; and

execution logic for executing the program sequence corresponding to the starting address provided by the starting address logic.

6. The packet processing system of claim 5 wherein the processing logic is to execute a programmed sequence of one or more commands for the packet, including executing a first command if the searching logic outputs an indicator of a hit condition, and second command distinct from the first if the searching logic outputs an indicator of a miss condition.

7. A non-transitory processor-readable medium having instructions stored thereon that, when executed by a processor in a packet processing system, the instructions cause the packet processing system to perform operations comprising:

receiving a packet comprising at least a destination address, a payload, and a key indicating a desired class of service for the packet selected from a plurality of possible classes of service;

deriving a key indicating the desired class of service for the packet from the plurality of possible classes of service selected from the group comprising uni-cast routing, multi-cast routing, and bridging;

providing a starting address of a program sequence for the packet responsive to the key, the starting address selected from a plurality of possible starting addresses, each associated with a different class of service from among the plurality of possible classes of service;

wherein providing the starting address of the program sequence comprises searching through a plurality of entries, each having a tag portion and a content portion indicating the starting address of a program sequence for a desired class of service, for an entry having a tag portion matching the key and a content portion indicating the starting address for a program sequence corresponding to the desired class of service indicated by the key, and, if a match is found, outputting the content portion of the matching entry and a signal indicating a hit condition, and, if a match is not found, outputting a signal indicating a miss condition;

holding, in a Content Addressable Memory (CAM) of the packet processing system, a plurality of program sequences corresponding to the plurality of possible starting addresses; and

executing the program sequence corresponding to the provided starting address.

8. The non-transitory processor-readable medium of claim 7 wherein providing the starting address of the program sequence comprises addressing a plurality of addressable entries in the CAM, each indicating the starting address of a program sequence for a desired class of service, to access an entry addressed by the key and indicating the starting address for a program sequence corresponding to the desired class of service indicated by the key, and outputting the starting address indicated by the addressed entry.

9. A packet processing system comprising:

means for receiving a packet comprising at least a destination address, a payload, and a key indicating a desired class of service for the packet selected from a plurality of possible classes of service selected from the group comprising uni-cast routing, multi-cast routing, and bridging;

means for deriving a key indicating the desired class of service for the packet from the plurality of possible classes of service;

means for providing a starting address of a program sequence for the packet responsive to the key, the starting address selected from a plurality of possible starting addresses, each associated with a different class of service from among the plurality of possible classes of service, wherein the means for providing the starting address of the program sequence comprises means for searching through a plurality of entries, each having a tag portion and a content portion indicating the starting address of a program sequence for a desired class of service, for an entry having a tag portion matching the key and a content portion indicating the starting address for a program sequence corresponding to the desired class of service indicated by the key, and, if a match is found, means for outputting the content portion of the matching entry and a signal indicating a hit condition, and, if a match is not found, means for outputting a signal indicating a miss condition;

a Content Addressable Memory (CAM) for holding a plurality of program sequences corresponding to the plurality of possible starting addresses; and

a processor to execute the program sequence corresponding to the provided starting address.

10. The packet processing system of claim 9 wherein the means for providing the starting address of the program sequence comprises means for addressing a plurality of addressable entries in the CAM, each indicating the starting address of a program sequence for a desired class of service, to access an entry addressed by the key and indicating the starting address for a program sequence corresponding to the desired class of service indicated by the key, and outputting the starting address indicated by the addressed entry.

Assignments (9)
RELEASE OF PATENT AND TRADEMARK SECURITY INTEREST AT REEL/FRAME NO. 46050/0546 Recorded Jul 30, 2026
From: BANK OF MONTREAL, AS AGENT
To: EXTREME NETWORKS, INC.
Reel/Frame 076081/0088 →
SECURITY INTEREST Recorded Jul 29, 2026
From: EXTREME NETWORKS, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 076078/0590 →
AMENDED SECURITY AGREEMENT Recorded Aug 18, 2023
From: EXTREME NETWORKS, INC.; AEROHIVE NETWORKS, INC.
To: BANK OF MONTREAL
Reel/Frame 064782/0971 →
RELEASE OF SECURITY INTEREST Recorded May 1, 2018
From: SILICON VALLEY BANK
To: EXTREME NETWORKS, INC.
Reel/Frame 046051/0775 →
SECURITY INTEREST Recorded May 1, 2018
From: EXTREME NETWORKS, INC.
To: BANK OF MONTREAL
Reel/Frame 046050/0546 →
THIRD AMENDED AND RESTATED PATENT AND TRADEMARK SECURITY AGREEMENT Recorded Oct 31, 2017
From: EXTREME NETWORKS, INC.
To: SILICON VALLEY BANK
Reel/Frame 044639/0300 →
SECOND AMENDED AND RESTATED PATENT AND TRADEMARK SECURITY AGREEMENT Recorded Jul 14, 2017
From: EXTREME NETWORKS, INC.
To: SILICON VALLEY BANK
Reel/Frame 043200/0614 →
AMENDED AND RESTATED PATENT AND TRADEMARK SECURITY AGREEMENT Recorded Oct 31, 2016
From: EXTREME NETWORKS, INC.
To: SILICON VALLEY BANK
Reel/Frame 040521/0762 →
SECURITY AGREEMENT Recorded Jul 27, 2015
From: EXTREME NETWORKS, INC.
To: SILICON VALLEY BANK
Reel/Frame 036189/0284 →
Continuity (3)
Division 10835271 · Apr 28, 2004
Provisional Application 60558039 · Mar 30, 2004
Related Publication 20100054256A1 · Mar 4, 2010