IP Library Granted Patent US 8,093,119
Granted Patent B2
US 8,093,119 · App. 12/490,318 · Granted Jan 10, 2012

CMOS microelectromechanical system (MEMS) device and fabrication method thereof

Assignee: Solid State System Co., Ltd.
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Quick Facts
Patent No.
US 8,093,119
App. No.
12/490,318
Granted
Jan 10, 2012
Kind
B2
Abstract

A method for fabricating the MEMS device includes providing a substrate. Then, a structural dielectric layer is formed over the substrate at a first side, wherein a diaphragm is embedded in the structural dielectric layer. The substrate is patterned from a second side to form a cavity in corresponding to the diaphragm and a plurality of venting holes in the substrate. An isotropic etching process is performed from the first side and the second side of the substrate via vent holes to remove a dielectric portion of the structural dielectric layer for exposing a central portion of the diaphragm while an end portion is held by a residue portion of the structural dielectric layer.

Claims (54)

1. A method for fabricating a microelectromechanical system (MEMS) device, comprising:

providing a substrate, having a first side and a second side, wherein a metal silicide is formed on the substrate at the first side, covering a MEMS region of the substrate;

forming a structural dielectric layer over the substrate at a first side, wherein a diaphragm is embedded in the structural dielectric layer;

patterning the substrate from the second side to form a plurality of perforating openings in the substrate corresponding to the diaphragm, wherein the metal silicide is exposed by the perforating openings in the substrate; and

performing an isotropic etching process from the first side and the second side of the substrate via the perforating openings to remove a dielectric portion of the structural dielectric layer for exposing a central portion of the diaphragm while an end of portion is held by a residue portion of the structural dielectric layer.

2. The method of claim 1 , wherein in the step of performing the isotropic etching process from the first side and the second side of the substrate via the perforating openings, the exposed metal silicide is etched during the isotropic etching process.

3. The method of claim 1 , wherein in the step of forming the structural dielectric layer over the substrate at a first side, the structural dielectric layer includes a CMOS circuit outside the diaphragm.

4. The method of claim 1 , wherein the step of forming the structural dielectric layer comprises forming a plurality of the metal block on the substrate at the first side for surrounding the perforating openings, wherein the metal block comprises an outer metal layer and an inner dielectric block covered by the outer metal layer.

5. The method of claim 4 , wherein in the step of performing the isotropic etching process, a side portion of the metal block is also exposed.

6. A method for fabricating a microelectromechanical system (MEMS) device, comprising:

providing a substrate, having a first side and a second side;

forming a structural dielectric layer over the substrate at a first side, wherein a diaphragm is embedded in the structural dielectric layer;

patterning the substrate from the second side to form a plurality of perforating openings in the substrate corresponding to the diaphragm; and

performing an isotropic etching process from the first side and the second side of the substrate via the perforating openings to remove a dielectric portion of the structural dielectric layer for exposing a central portion of the diaphragm while an end portion is held by a residue portion of the structural dielectric layer,

wherein the structural dielectric layer comprises a structural sacrificial dielectric layer, and the step of forming the structural dielectric layer comprises:

forming at least a structural sacrificial dielectric layer over the substrate; and

forming the diaphragm over the first layer

wherein the structural sacrificial dielectric layer is larger in etching rate than the structural dielectric layer outside of the sacrificial layer.

7. The method of claim 6 , wherein the step of forming the structural dielectric layer further comprise forming a top sacrificial dielectric layer formed over the diaphragm, wherein the top sacrificial dielectric layer is slower in etching rate than the structural dielectric layer outside of the sacrificial layer.

8. A method for fabricating a microelectromechanical system (MEMS) device, comprising:

providing a substrate, having a first side and a second side;

forming a structural dielectric layer over the substrate at a first side, wherein a diaphragm is embedded in the structural dielectric layer;

patterning the substrate from the second side to form a plurality of perforating openings in the substrate corresponding to the diaphragm; and

performing an isotropic etching process from the first side and the second side of the substrate via the perforating openings to remove a dielectric portion of the structural dielectric layer for exposing a central portion of the diaphragm while an end portion is held by a residue portion of the structural dielectric layer,

wherein the structural dielectric layer comprises a structural sacrificial dielectric layer wrapping the diaphragm opposite to the substrate and the structural sacrificial dielectric layer is larger in etching rate than the structural dielectric layer outside of the structural sacrificial layer.

9. The method of claim 8 , wherein the structural dielectric layer comprises a structural sacrificial dielectric layer and a top sacrificial dielectric layer, and the step of forming the structural dielectric layer comprises:

forming the structural sacrificial dielectric layer over the substrate, and wrapping the diaphragm; and

forming the top sacrificial dielectric layer over the structural sacrificial dielectric layer,

wherein the structural sacrificial dielectric layer is larger in etching rate than the structural dielectric layer outside of the sacrificial layer, and top sacrificial dielectric layer is slower in etching rate than the structural dielectric layer outside of the sacrificial layer.

10. The method of claim 8 , wherein the step of forming the structural dielectric layer further comprise forming a top sacrificial dielectric layer over the diaphragm, wherein the top sacrificial dielectric layer is slower in etching rate than the structural dielectric layer outside of the sacrificial layer.

11. The method of claim 8 , wherein the structural sacrificial dielectric layer is larger in etching rate than the structural dielectric layer outside of the sacrificial layer, and a part of the structure dielectric layer on the substrate under the structural sacrificial dielectric layer remains between the perforating openings after performing the isotropic etching process.

12. A method for fabricating a microelectromechanical system (MEMS) device, comprising:

providing a substrate, having a first side and a second side;

forming a structural dielectric layer over the substrate at the first side, wherein a diaphragm and a plurality of dielectric blocks enclosed by conductive layers are embedded in the structural dielectric layer, wherein the dielectric blocks form a back plate, and a reserved dielectric portion is between the dielectric blocks;

patterning the substrate from the second side to form a cavity in corresponding to the diaphragm and to expose the structural dielectric layer; and

performing an isotropic etching process from the first side and the second side of the substrate via the cavity to remove a dielectric portion of the structural dielectric layer for exposing a central portion of the diaphragm and the back plate while an end portion of the diaphragm and the back plate are held by a residue portion of the structural dielectric layer, wherein the reserved dielectric portion between the dielectric blocks is etched to form multiple venting holes, the venting holes expose a conductive wall of the dielectric blocks of the back plate, and a dielectric portion of the structural dielectric layer is removed via the venting holes for exposing the central portion of the diaphragm and back plate.

13. A method for fabricating a microelectromechanical system (MEMS) device, comprising:

providing a substrate, having a first side and a second side;

forming a structural dielectric layer over the substrate at the first side, wherein a diaphragm and a plurality of dielectric blocks enclosed by conductive layers are embedded in the structural dielectric layer, wherein the dielectric blocks form a back plate, and a reserved dielectric portion is between the dielectric blocks;

patterning the substrate from the second side to form a cavity in corresponding to the diaphragm and to expose the structural dielectric layer; and

performing an isotropic etching process from the first side and the second side of the substrate via the cavity to remove a dielectric portion of the structural dielectric layer for exposing a central portion of the diaphragm and the back plate while an end portion of the diaphragm and the back plate are held by a residue portion of the structural dielectric layer,

wherein the structural dielectric layer comprises a structural sacrificial dielectric layer wrapping the diaphragm opposite to the back plate and the structural sacrificial dielectric layer is larger in etching rate than the structural dielectric layer outside of the structural sacrificial layer.

14. The method of claim 13 , wherein the step of forming the structural dielectric layer further comprise forming a top sacrificial dielectric layer over the diaphragm, wherein the top sacrificial dielectric layer is slower in etching rate than the structural dielectric layer outside of the sacrificial layer.

15. The method of claim 13 , wherein the structural sacrificial dielectric layer is larger in etching rate than the structural dielectric layer outside of the sacrificial layer, and a part of the structure dielectric layer on the substrate under the structural sacrificial dielectric layer remains on the back plate facing the diaphragm after performing the isotropic etching process.

16. A method for fabricating a microelectromechanical system (MEMS) device, comprising:

providing a substrate, having a first side and a second side;

forming a structural dielectric layer over the substrate at the first side, wherein a diaphragm and a plurality of dielectric blocks enclosed by conductive layers are embedded in the structural dielectric layer, wherein the dielectric blocks form a back plate, and a reserved dielectric portion is between the dielectric blocks;

patterning the substrate from the second side to form a cavity in corresponding to the diaphragm and to expose the structural dielectric layer: and

performing an isotropic etching process from the first side and the second side of the substrate via the cavity to remove a dielectric portion of the structural dielectric layer for exposing a central portion of the diaphragm and the back plate while an end portion of the diaphragm and the back plate are held by a residue portion of the structural dielectric layer,

wherein the structural dielectric layer comprises a structural sacrificial dielectric layer, and the step of forming the structural dielectric layer comprises:

forming the structural sacrificial dielectric layer over the substrate, and wrapping at least one side of a diaphragm,

wherein the structural sacrificial dielectric layer is larger in etching rate than the structural dielectric layer outside of the sacrificial layer.

17. The method of claim 16 , wherein the step of forming the structural dielectric layer further comprise forming a top sacrificial dielectric layer over the diaphragm, wherein the top sacrificial dielectric layer is slower in etching rate than the structural dielectric layer outside of the sacrificial layer.

18. The method of claim 16 , wherein the structural sacrificial dielectric layer is larger in etching rate than the structural dielectric layer outside of the sacrificial layer, and a part of the structure dielectric layer on the substrate under the structural sacrificial dielectric layer remains on the back plate facing the diaphragm after performing the isotropic etching process.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2009
From: HSIEH, TSUNG-MIN; LEE, CHIEN-HSING
To: SOLID STATE SYSTEM CO., LTD.
Reel/Frame 022912/0521 →
Continuity (1)
Related Publication 20100330722A1 · Dec 30, 2010