Three-dimensional semiconductor device structures and methods
A three-dimensional semiconductor device structure includes a first semiconductor device and a second semiconductor device bonded together using a patterned conductive layer according to an embodiment of the invention. The first semiconductor device includes a first plurality of terminals on its front side, and the second semiconductor device includes a second plurality of terminals on its front side. The patterned conductive layer includes a plurality of conductive regions. Each of the conductive regions is bonded to a conductor coupled to one of the first plurality of terminals and bonded to another conductor coupled to one of the second plurality of terminals, providing electrical coupling between the first semiconductor device and the second semiconductor device. In a specific embodiment, each terminal of the first semiconductor device is bonded to a corresponding terminal of the second semiconductor device, providing a parallel combination of the first and the second semiconductor devices.
1. A three-dimensional semiconductor device, comprising:
a first semiconductor device having a first metal substrate on its back side, the first metal substrate also functioning as a first terminal of the first semiconductor device;
a first conductive structure coupled to a back side of the first metal substrate;
a second semiconductor device having a first terminal and a second terminal on its front side;
a second conductive structure coupled to the first terminal of the second semiconductor device, the second conductive structure being bonded to the first conductive structure and providing electrical contact between the back side of the first semiconductor device and the front side of the second semiconductor device;
a third conductive structure coupled to the second terminal of the second semiconductor device; and
a patterned metal layer located between the first and the second semiconductor devices, the patterned metal layer including at least a first region, the first region being bonded to the third conductive structure for providing an external contact;
wherein each of the first and the second semiconductor devices comprises a trench power MOS transistor;
wherein the first conductor is coupled to a drain terminal of the first semiconductor device and the second conductor is coupled to a source terminal of the second semiconductor device, whereby the three-dimensional semiconductor device comprises a series combination of the first and the second semiconductor devices.
2. A three-dimensional semiconductor device, comprising:
a first semiconductor device having a first metal substrate on its back side, the first metal substrate also functioning as a first terminal of the first semiconductor device;
a first conductive structure coupled to a back side of the first metal substrate;
a second semiconductor device having a first terminal and a second terminal on its front side;
a second conductive structure coupled to the first terminal of the second semiconductor device, the second conductive structure being bonded to the first conductive structure and providing electrical contact between the back side of the first semiconductor device and the front side of the second semiconductor device;
a third conductive structure coupled to the second terminal of the second semiconductor device; and
a patterned metal layer located between the first and the second semiconductor devices, the patterned metal layer including at least a first region, the first region being bonded to the third conductive structure for providing an external contact;
wherein each of the first and the second semiconductor devices comprises a trench power MOS transistor;
wherein the first region of the patterned metal layer provides a contact to a gate terminal of the second semiconductor device.
3. A method for forming a three-dimensional semiconductor device, comprising:
providing a first semiconductor device having a first metal substrate on its back side, the first metal substrate also functioning as a first terminal of the first semiconductor device;
forming a first conductive structure coupled to the first metal substrate;
providing a second semiconductor device having a first terminal and a second terminal on its front side;
forming a second conductive structure and a third conductive structure coupled to first and second terminals of the second semiconductor device, respectively;
providing a patterned conductive layer including at least a first region;
bonding the first conductive structure to the second conductive structure to provide electrical contact between the first semiconductor device and the second semiconductor device;
bonding the first region of the patterned conductive layer to the third conductive structure; and
selectively removing portions of the patterned conductive layer to provide an external contact for the three-dimensional semiconductor device;
wherein at least one of the first and the second semiconductor devices comprises an MOS transistor;
wherein the first conductor is coupled to a drain terminal of the first semiconductor device and the second conductor is coupled to a source terminal of the second semiconductor device, whereby the three-dimensional semiconductor device comprises a series combination of the first and the second semiconductor devices.
4. The method of claim 3
wherein each of the first and the second semiconductor devices comprises a trench power MOS transistor, and
wherein the first region of the patterned metal layer provides a contact to a gate terminal of the second semiconductor device.