IP Library Granted Patent US 8,110,896
Granted Patent B2
US 8,110,896 · App. 11/472,759 · Granted Feb 7, 2012

Substrate structure with capacitor component embedded therein and method for fabricating the same

Assignee: Unimicron Technology Corp.
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Quick Facts
Patent No.
US 8,110,896
App. No.
11/472,759
Granted
Feb 7, 2012
Kind
B2
Abstract

A capacitor components embedded substrate structure comprises a substrate, capacitor components, a first and second dielectric layers, and a circuit layer. The substrate includes a first surface, a second surface, and a hole penetrating the first and the second surfaces. The capacitor components whose surface is pretreated with a roughness process is received in the hole of the substrate, such that at least one surface of the capacitor components is disposed with a plurality of electrode pads. The first and the second dielectric layers are formed on the surface of substrate and the surface of the capacitor components respectively such that the capacitor components are secured in position in the hole of the substrate. The first and the second dielectric layers have a plurality of openings to expose the electrode pads of the capacitor components. The circuit layer is formed on the surface of the first and second dielectric layers, and a conductive structure is formed in the opening of the first and second dielectric layers for electrically connecting the circuit layer to the electrode pads of the capacitor components. The present invention further provides a method for fabricating a capacitor components embedded substrate structure. The capacitor components embedded substrate structure and the method for fabricating the same of the present invention reinforces the bonding strength between the capacitor components and the substrate, reduces substrate package sizes, and allows circuit layout design to be more flexible.

Claims (16)

1. A capacitor component-embedded substrate structure, comprising:

a substrate having first and second surfaces and one or more holes penetrating the first and second surfaces;

a capacitor component disposed in each of the one or more holes of the substrate, wherein the capacitor component has a plurality of electrode pads on at least one surface, and the at least one surface of the capacitor component is a rough surface, and wherein the capacitor component comprises a metallic roughness layer formed on a side of the capacitor component so as to increase bonding strength between the side of the capacitor component and walls of the holes of the substrate;

first and second dielectric layers respectively formed on the surfaces of the substrate and capacitor components, allowing the capacitor components to be secured in position in the holes of the substrate, in which the dielectric layers have openings to expose the electrode pads of the capacitor components, and gaps between the substrate and the metallic roughness layer of the capacitor components are filled with either one or both of the first and second dielectric layers so as to secure in position the capacitor components in the holes of the substrate;

circuit layers formed on the surface of the dielectric layers, having conductive structures in the openings of the dielectric layers, so as to allow the circuit layers to be electrically connected to the electrode pads of the capacitor components;

a circuit build-up structure formed on the surface of the first and second dielectric layers and the circuit layers, wherein the circuit build-up structure further comprises dielectric layers, circuit layers stacked on the dielectric layers, and conductive structures formed in the dielectric layers, in which the conductive structures are formed in the circuit build-up structure so as to be electrically connected to the circuit layer on the surface of the first and second dielectric layers while electrical connection pads are formed on the surface of the circuit build-up structure; and

a plurality of plated through holes penetrating the circuit layers on the first and second surfaces of the substrate and the circuit build-up structure.

2. The capacitor component-embedded substrate structure of claim 1 , further comprising a solder mask layer formed on the surface of the circuit build-up structure, with a plurality of openings thereon for exposing the electrical connection pads of the circuit build-up structure.

3. A capacitor component-embedded substrate structure, comprising:

a substrate having first and second surfaces and one or more holes penetrating the first and second surfaces;

a capacitor component disposed in each of the one or more holes of the substrate, wherein the capacitor component has a plurality of electrode pads on at least one surface, and the at least one surface of the capacitor component is a rough surface, and wherein the capacitor component comprises a metallic roughness layer formed on a side of the capacitor component so as to increase bonding strength between the side of the capacitor component and walls of the holes of the substrate;

first and second dielectric layers respectively formed on the surfaces of the substrate and capacitor components, allowing the capacitor components to be secured in position in the holes of the substrate, in which the dielectric layers have openings to expose the electrode pads of the capacitor components, and gaps between the substrate and the metallic roughness layer of the capacitor components are filled with an adhesive material so as to secure in position the capacitor components in the holes of the substrate;

circuit layers formed on the surface of the dielectric layers, having conductive structures in the openings of the dielectric layers, so as to allow the circuit layers to be electrically connected to the electrode pads of the capacitor components;

a circuit build-up structure formed on the surface of the first and second dielectric layers and the circuit layers, wherein the circuit build-up structure further comprises dielectric layers, circuit layers stacked on the dielectric layers, and conductive structures formed in the dielectric layers, in which the conductive structures are formed in the circuit build-up structure so as to be electrically connected to the circuit layer on the surface of the first and second dielectric layers while electrical connection pads are formed on the surface of the circuit build-up structure; and

a plurality of plated through holes penetrating the circuit layers on the first and second surfaces of the substrate and the circuit build-up structure.

4. The capacitor component-embedded substrate structure of claim 3 , further comprising a solder mask layer formed on the surface of the circuit build-up structure, with a plurality of openings thereon for exposing the electrical connection pads of the circuit build-up structure.

Assignments (2)
CHANGE OF NAME Recorded Nov 29, 2011
From: PHOENIX PRECISION TECHNOLOGY CORPORATION
To: UNIMICRON TECHNOLOGY CORP.
Reel/Frame 027292/0138 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2006
From: HSU, SHIH-PING
To: PHOENIX PRECISION TECHNOLOGY CORPORATION
Reel/Frame 018007/0133 →
Priority Claims (1)
TW 94146634 A · Dec 27, 2005 · national
Continuity (1)
Related Publication 20070143993A1 · Jun 28, 2007