Non-volatile memory device and method for fabricating non-volatile memory device
Provided are nonvolatile memory devices with a three-dimensional structure and methods of fabricating the same. The nonvolatile memory device includes conductive patterns three-dimensionally arranged on a semiconductor substrate, semiconductor patterns that extend from the semiconductor substrate and intersect one-side walls of the conductive patterns, charge storage layers interposed between the semiconductor patterns and one-side walls of the conductive patterns, and seed layer patterns interposed between the charge storage layers and one-side walls of the conductive patterns.
1. A nonvolatile memory device, comprising:
conductive patterns three-dimensionally arranged on a semiconductor substrate;
semiconductor patterns extending from the semiconductor substrate and intersecting one-side walls of the conductive patterns;
charge storage layers interposed between the semiconductor patterns and one-side walls of the conductive patterns; and
seed layer patterns interposed between the charge storage layers and one-side walls of the conductive patterns.
2. The nonvolatile memory device as set forth in claim 1 , further comprising:
insulating interlayer patterns interposed with the conductive patterns; and
wherein the one-side walls of the conductive patterns and one-side walls of the insulating layer patterns adjacent thereto are disposed on different perpendicular lines.
3. The nonvolatile memory device as set forth in claim 2 , further comprising:
extended portions corresponding to recessed portions of the one-side walls of the conductive patterns disposed between the insulating layer patterns vertically adjacent to each other;
wherein the seed layer patterns are disposed in the extended portions.
4. The nonvolatile memory device as set forth in claim 2 , wherein a distance between the conductive patterns horizontally adjacent to each other is larger than a distance between the insulating layer patterns horizontally adjacent to each other.
5. The nonvolatile memory device as set forth in claim 1 , wherein respective ones of the seed layer patterns adjacent to respective ones of the conductive patterns are isolated from respective ones of the seed layer patterns adjacent to respective other ones of the conductive patterns.