Integrated package circuit with stiffener
An integrated circuit package employs a stiffener layer that houses a passive electronic component to maintain mechanical properties when a thinner substrate is used. The use of either a retention wall or a stiffener allows for the manufacture of these integrated circuit package using strip, matrix, or array technology where a larger board with a plurality of integrated circuit packages is produced industrially and then cut to individual units.
1. An integrated circuit package, comprising:
a substrate;
a packaged integrated chip coupled to the substrate;
at least one passive electronic component coupled to the substrate; and
a stiffener comprising a top surface and a bottom surface, the bottom surface coupled to the substrate and having a space_at least partly surrounding the at least one passive electronic component.
2. The integrated circuit package of claim 1 , wherein the bottom surface is recessed and houses the at least one passive electronic component.
3. The integrated circuit package of claim 1 , wherein the stiffener is comprised of a epoxy resin reinforced with a woven fiberglass mat.
4. The integrated circuit package of claim 1 , wherein the substrate has a thickness of about 70 to 400 microns.
5. The integrated circuit package of claim 1 , wherein the substrate has a thickness of about 400 microns.
6. The integrated circuit package of claim 1 , wherein the substrate is a thin core substrate structure.
7. The integrated circuit package of claim 1 , wherein the substrate is a substrate structure with no core.
8. The integrated circuit package of claim 1 , wherein the substrate is a polyimide tape substrate.
9. The integrated circuit package of claim 1 , wherein the package insulated circuit is integrated in a flip-chip ball grid array.
10. The integrated circuit package of claim 1 , wherein the stiffener has a thickness of about 500 to 1000 microns.
11. The integrated circuit package of claim 10 , wherein the packaged integrated chip has a thickness greater than the thickness of the stiffener.
12. The integrated circuit package of claim 11 , wherein a heat sink is attached to a top side of the packaged integrated chip.
13. The integrated circuit package of claim 1 , wherein the at least one passive electronic component is a capacitor.
14. The integrated circuit package of claim 1 , comprising an encapsulant interposed between at least a portion of the packaged integrated chip and the stiffener and in contact with the stiffener.
15. The integrated circuit package of claim 1 wherein the packaged integrated chip is located in a recess in the stiffener and wherein the stiffener is configured to form an encapsulant retention structure for the packaged integrated chip.
16. An integrated circuit package, comprising:
a substrate;
a packaged integrated chip coupled to the substrate;
at least one passive electronic component coupled to the substrate;
a stiffener comprising a top surface and a bottom surface, the bottom surface coupled to the substrate and at least partly surrounding the at least one passive electronic component; and
wherein the stiffener is comprised of a epoxy resin reinforced with a woven fiberglass mat.