IP Library › Granted Patent US 8,132,267
Granted Patent B2
US 8,132,267 · App. 12/286,352 · Granted Mar 6, 2012

Apparatus and method to harden computer system

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 8,132,267
App. No.
12/286,352
Granted
Mar 6, 2012
Kind
B2
Abstract

In some embodiments, a processor-based system may include a processor, the processor having a processor identification, one or more electronic components coupled to the processor, at least one of the electronic components having a component identification, and a hardware security component coupled to the processor and the electronic component. The hardware security component may include a secure non-volatile memory and a controller. The controller may be configured to receive the processor identification from the processor, receive the at least one component identification from the one or more electronic components, and determine if a boot of the processor-based system is a provisioning boot of the processor-based system. If the boot is determined to be the provisioning boot, the controller may be configured to store a security code in the secure non-volatile memory, wherein the security code is based on the processor identification and the at least one component identification. Other embodiments are disclosed and claimed.

Claims (53)

1. A processor-based system, comprising:

a processor, the processor having a processor identification;

one or more electronic components coupled to the processor, at least one of the electronic components having a component identification; and

a hardware security component coupled to the processor and the electronic component, wherein the hardware security component includes:

a secure non-volatile memory; and

a controller, wherein the controller is configured to:

receive the processor identification from the processor;

receive the at least one component identification from the one or more electronic components; and

determine if a boot of the processor-based system is a provisioning boot of the processor-based system;

if the boot is determined to be the provisioning boot, the controller is configured to store a security code in the secure non-volatile memory, wherein the security code is based on the processor identification and the at least one component identification;

if the boot is not determined to be the provisioning boot, the controller is configured to:

determine a platform code based on the processor identification and the at least one component identification;

determine if the platform code is valid based on a comparison with the security code stored in the secure non-volatile memory;

if the platform code is determined to be valid, proceed to boot the processor-based system; and

if the platform code is not determined to be valid, discontinue the boot of the processor-based system.

2. The processor-based system of claim 1 , wherein the hardware security component is integrated with the processor in a same package as the processor.

3. The processor-based system of claim 2 , wherein the secure non-volatile memory is integrated with the hardware security component and the processor in a same package as the hardware security component and the processor.

4. The processor-based system of claim 1 , wherein the hardware security component is integrated with one of the electronic components in a same package as the electronic component.

5. The processor-based system of claim 4 , wherein the secure non-volatile memory is integrated with the hardware security component and the electronic component in a same package as the hardware security component and the electronic component.

6. The processor-based system of claim 5 , wherein the electronic component integrated with the hardware security component and the secure non-volatile memory comprises a chipset component.

7. The processor-based system of claim 1 , wherein the electronic components comprise at least one of a chipset component, a memory component, and an input/output device.

8. The processor-based system of claim 1 , wherein the controller is further configured to:

determine if a communication channel is present; and

if the network connection is determined to be present and if the platform code is not determined to be valid, send a report over the communication channel.

9. The processor-based system of claim 8 , wherein the communication channel comprises a network connection.

10. The processor-based system of claim 8 , wherein the communication channel comprises a telephone connection.

11. The processor-based system of claim 1 , wherein the controller is further configured to:

determine if the platform code needs to be validated based on information stored in the secure non-volatile memory; and

if the platform code is determined to not need to be validated, proceed to boot the processor-based system.

12. A method of utilizing a processor-based system, comprising:

receiving a processor identification from a processor;

receiving at least one component identification from one or more electronic components;

determining if a boot of the processor-based system is a provisioning boot of the processor-based system;

if the boot is determined to be the provisioning boot, storing a security code in a secure non-volatile memory, wherein the security code is based on the processor identification and the at least one component identification; and

if the boot is not determined to be the provisioning boot:

determining a platform code based on the processor identification and the at least one component identification;

determining if the platform code is valid based on a comparison with the security code stored in the secure non-volatile memory;

if the platform code is determined to be valid, booting the processor-based system; and

if the platform code is not determined to be valid, discontinuing the boot of the processor-based system.

13. The method of claim 12 , further comprising:

providing the secure non-volatile memory in a same package as the processor.

14. The method of claim 12 , further comprising:

providing the secure non-volatile memory in a same package as one of the one or more the electronic components.

15. The method of claim 14 , wherein the electronic component provided with the secure non-volatile memory comprises a chipset component.

16. The method of claim 12 , wherein the electronic components comprise at least one of a chipset component, a memory component, and an input/output device.

17. The method of claim 12 , further comprising:

determining if a communication channel is present; and

if the communication channel is determined to be present and if the platform code is not determined to be valid, sending a report over the communication channel.

18. The method of claim 16 , wherein the communication channel comprises a network connection.

19. The method of claim 16 , wherein the communication channel comprises a telephone connection.

20. The method of claim 12 , further comprising:

determining if the platform code needs to be validated based on information stored in the secure non-volatile memory; and

if the platform code is determined to not need to be validated, proceeding to boot the processor-based system.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2010
From: GURUMOORTHY, NAGA; KUMAR, ARVIND; PARKER, MATTHEW J.
To: INTEL CORPORATION
Reel/Frame 024309/0605 →
Continuity (1)
Related Publication 20100082961A1 · Apr 1, 2010