Mixer circuit and method of operation

1. A mixer circuit to mix a RF (Radio Frequency) signal with a LO (Local Oscillator) signal to generate an IF (Intermediate Frequency) signal, the mixer having a mixing branch comprising:

a first transconductance stage having an RF input to receive the RF signal to transform into a current signal;

a first current switching core to switch the current signal according to the LO signal and an LO signal which forms with the LO signal a differential signal;

a dummy branch connected in parallel of the mixing branch, the dummy branch comprising:

a second transconductance stage having an input connected to a reference potential which is independent from the RF signal, to transform the reference potential into a current signal; and

a second current switching core to switch the current signal according to LO and LO signals; and

chopping switches to connect in series the transconductance stages of the mixing branch to the first current switching core and, in the alternative, to the second current switching core under the control of a chopping signal,

wherein the mixer circuit further comprises a chopping signal generator able to generate the chopping signal which is a pseudo-random bit sequence that systematically includes as many logical zeros as logical ones over one period, and wherein the pseudo-random bit sequence generator comprises:

a pseudo-random bit sequence builder which builds a pseudo-random bit sequence having a period T B and having a number of logical zeros different from the number of logical ones over period T B ; and

a reversing core able to alternatively output the built pseudo-random bit sequence and its opposite so as to output a longer pseudo-random bits sequence having as many logical zeros as logical ones over each period of this longer pseudo-random bit sequence.

2. The mixer circuit according to claim 1 , wherein the first current switching core is series connected with the first transconductance stage through a filter.

3. The mixer circuit according to claim 1 , wherein the second current switching core is series connected with the second transconductance stage through a filter.

4. The mixer circuit according to claim 1 , wherein the first current switching core is connected between a DC current source and a DC current sink.

5. The mixer circuit according to claim 1 , wherein the second current switching core is connected between a DC current source and a DC current sink.

6. The mixer circuit according to claim 1 , wherein the first transconductance stage is directly connected to another DC current source without passing through one of the current switching stages.

7. The mixer circuit according to claim 1 , wherein the second transconductance stage is directly connected to another DC current source without passing through one of the current switching stages.

8. A mixer circuit to mix a RF (Radio Frequency) signal with a LO (Local Oscillator) signal to generate an IF (Intermediate Frequency) signal, the mixer having a mixing branch comprising:

a first transconductance stage having an RF input, and a current output;

a first current switching core having a LO input, a current input, and a current output;

a second transconductance stage having a reference input, and a current output;

a second current switching core having a LO input, a current input, and a current output;

a first set of chopping switches coupled between the current outputs of the first and second transconductance stages, and the current inputs of the first and second current switching cores; and

a second set of chopping switches coupled between the current outputs of the first and second current switching cores, and an IF output,

wherein the mixer circuit further comprises a chopping signal generator able to generate chopping signals for the first and second sets of chopping switches, which is a pseudo-random bit sequence that systematically includes as many logical zeros as logical ones over one period, and wherein the pseudo-random bit sequence generator comprises:

a pseudo-random bit sequence builder which builds a pseudo-random bit sequence having a period T B and having a number of logical zeros different from the number of logical ones over period T B ; and

a reversing core able to alternatively output the built pseudo-random bit sequence and its opposite so as to output a longer pseudo-random bits sequence having as many logical zeros as logical ones over each period of this longer pseudo-random bit sequence.

9. The mixer circuit according to claim 8 , wherein the first current switching core is series connected with the first transconductance stage through a filter.

10. The mixer circuit according to claim 8 , wherein the second current switching core is series connected with the second transconductance stage through a filter.

11. The mixer circuit according to claim 8 , wherein the first current switching core is connected between a DC current source and a DC current sink.

12. The mixer circuit according to claim 8 , wherein the second current switching core is connected between a DC current source and a DC current sink.

13. The mixer circuit according to claim 8 , wherein the first transconductance stage is coupled to ground.

14. The mixer circuit according to claim 8 , wherein the second transconductance stage is coupled to ground.

15. A method of mixing a RF (Radio Frequency) signal with a LO (Local Oscillator) signal to generate an IF (Intermediate Frequency) signal, the method comprising:

generating a first current from an RF input;

generating a second current from a reference input;

providing a first current switching core under the control of an LO signal;

providing a second current switching core under the control of the LO signal;

switching the first current between the first and second switching cores under the control of a chopping signal;

switching the second current between the first and second switching cores under the control of the chopping signal;

using a current output of the first and second current switching cores to generate an IF output; and

providing a chopping signal generator able to generate the chopping signals, which is a pseudo-random bit sequence that systematically includes as many logical zeros as logical ones over one period, and wherein the pseudo-random bit sequence generator comprises:

a pseudo-random bit sequence builder which builds a pseudo-random bit sequence having a period T B and having a number of logical zeros different from the number of logical ones over period T B ; and

a reversing core able to alternatively output the built pseudo-random bit sequence and its opposite so as to output a longer pseudo-random bits sequence having as many logical zeros as logical ones over each period of this longer pseudo-random bit sequence.

16. The method according to claim 15 , further comprising generating the chopping signal using a pseudo-random bit sequence that systematically includes as many logical zeros as logical ones over one period.