Compiler, compiler apparatus and compilation method

Assignee: Panasonic Corporation

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Quick Facts

Patent No.: US 8,151,254
App. No.: 11/790,215
Granted: Apr 3, 2012
Kind: B2

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Abstract

An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.

Claims (117)

1. A compilation method for translating a source program into a machine language program, using operation definition information in which an operation that corresponds to a machine language instruction for a target processor is defined in a format of a function invocation, the compilation method comprising:

a parser step of analyzing, using a processor, the source program; and

a code generation step of generating machine language instructions including first instructions and second instructions from the analyzed source program which includes operations defined in the operation definition information, the first instructions corresponding to the operations, the second instructions not corresponding to the operations,

wherein the code generation step includes a combining sub-step of combining the first instructions and the second instructions into one machine language instruction.

2. A compilation method for translating a source program into a machine language program, using operation definition information in which an operation that corresponds to a machine language instruction for a target processor is defined in a format of a function invocation, the compilation method comprising:

a parser step of analyzing, using a processor, the source program; and

wherein the code generation step includes a removing sub-step of removing redundancy between the first instructions and the second instructions.

3. A compilation method for translating a source program into a machine language program, using operation definition information in which an operation that corresponds to a machine language instruction for a target processor is defined in a format of a function invocation, the compilation method comprising:

a parser step of analyzing, using a processor, the source program; and

wherein the code generation step includes a changing sub-step of changing an order of the first instructions and the second instructions.

4. The compilation method according to claim 1 ,

wherein the operations include a function that returns the number of bits of 1 included in input data, and

one of the first instructions counts the number of bits of 1 of a value stored in a first register and stores the result in a second register.

5. The compilation method according to claim 1 ,

wherein the operations include a function that returns a sign-expanded value based on bits extracted at designated bit positions from input data, and

one of the first instructions takes out bits at the bit positions designated by a second register from a value stored in a first register, sign-expands said bits and stores the sign-expanded bits in a third register.

6. The compilation method according to claim 1 ,

wherein the operations include a function that returns a zero-expanded value based on bits extracted at designated bit positions from input data, and

one of the first instructions takes out bits at the bit positions designated by a second register from a value stored in a first register, zero-expands said bits and stores the zero-expanded bits in a third register.

7. The compilation method according to claim 2 ,

wherein the operations include a function that returns the number of bits of 1 included in input data, and

one of the first instructions counts the number of bits of 1 of a value stored in a first register and stores the result in a second register.

8. The compilation method according to claim 2 ,

wherein the operations include a function that returns a sign-expanded value based on bits extracted at designated bit positions from input data, and

9. The compilation method according to claim 2 ,

wherein the operations include a function that returns a zero-expanded value based on bits extracted at designated bit positions from input data, and

10. The compilation method according to claim 3 ,

wherein the operations include a function that returns the number of bits of 1 included in input data, and

one of the first instructions counts the number of bits of 1 of a value stored in a first register and stores the result in a second register.

11. The compilation method according to claim 3 ,

wherein the operations include a function that returns a sign-expanded value based on bits extracted at designated bit positions from input data, and

12. The compilation method according to claim 3 ,

wherein the operations include a function that returns a zero-expanded value based on bits extracted at designated bit positions from input data, and

13. A system comprising a target processor and a compiler apparatus for the target processor, the compiler apparatus using a compilation method for translating a source program into a machine language program, using operation definition information in which an operation that corresponds to a machine language instruction for the target processor is defined in a format of a function invocation,

wherein the compilation method includes: