Metallization for chip scale packages in wafer level packaging

1. A method of forming a semiconductor device, the method comprising:

forming a first trench from a front side of a substrate that has the front side and an opposite back side, the first trench having sidewalls and a bottom surface;

forming an insulator layer over the sidewalls and the bottom surface of the first trench;

forming a conductive liner over the insulator layer;

filling a bottom portion of the first trench with a fill material, the fill material partially filling the first trench such that a portion of the conductive liner over the sidewalls of the first trench remains exposed;

forming a conductive layer over the exposed conductive liner;

removing the fill material; and

separating the substrate along the first trench.

2. The method of claim 1 , further comprising:

forming a second trench in the substrate after removing the fill material, the second trench being formed from the bottom surface of the first trench.

3. The method of claim 1 , wherein filling a bottom portion of the trench comprises filling a central region of the bottom portion of the first trench without covering the conductive liner on the sidewalls of the trench.

4. The method of claim 3 , further comprising:

forming a second trench in the substrate after removing the fill material, the second trench being formed from the bottom surface of the first trench.

5. The method of claim 1 , wherein filling a bottom portion of the trench comprises covering the sidewalls of the first trench in the bottom portion.

6. The method of claim 1 , wherein the substrate is a semiconductor substrate, wherein the insulator layer comprises an oxide or a nitride, wherein the conductive liner comprises copper, tungsten, Ta, TaN, WN, WSi, TiN, and/or Ru, and wherein the conductive layer comprises a metal selected from a group consisting of copper, nickel, chromium, palladium, gold, cobalt, platinum, and silver.

7. The method of claim 1 , wherein forming a conductive layer comprises using an electro chemical deposition process.

8. The method of claim 1 , wherein separating the substrate comprises thinning the substrate from the back side.

9. The method of claim 1 , wherein the fill material is removed from the front side of the substrate.

10. A method of forming a semiconductor device, the method comprising:

forming a first trench from a front side of a substrate that has the front side and an opposite back side, the first trench having sidewalls extending from a top surface to a bottom surface;

forming an insulator layer over the sidewalls and the bottom surface of the first trench;

forming a first conductive layer over a top portion of the sidewalls of the first trench such that the first conductive layer is not formed over a bottom portion of the sidewalls of the first trench, the bottom portion being directly below the top portion; and

separating the substrate along the first trench.

11. The method of claim 10 , wherein forming a first conductive layer comprises:

forming a conductive liner over the insulating layer;

filling a bottom portion of the trench with a fill material;

forming the first conductive layer over an exposed conductive liner; and

removing the fill material.

12. The method of claim 11 , wherein filling a bottom portion of the trench comprises filling a central region of the bottom portion of the first trench without covering the conductive liner on the sidewalls of the trench.

13. The method of claim 12 , further comprising:

forming a second trench in the substrate after removing the fill material, the second trench being formed from the bottom surface of the first trench, the second trench having a smaller critical dimension than the first trench.

14. The method of claim 11 , wherein filling a bottom portion of the first trench comprises covering the sidewalls of the first trench in the bottom portion.

15. The method of claim 10 , wherein forming an insulator layer deposits the insulator layer over a top surface of the substrate.

16. The method of claim 15 , wherein the insulator layer is formed over an entire top surface of the substrate.

17. The method of claim 15 , wherein the insulator layer is selective selectively deposited over a portion of the top surface of the substrate.

18. The method of claim 10 , wherein forming a first conductive layer comprises sputtering metal atoms into the first trench, and wherein the sputtering does not form the first conductive layer in a bottom portion of the first trench.

19. The method of claim 10 , further comprising forming a second conductive layer over the first conductive layer.

20. The method of claim 19 , wherein forming a second conductive layer comprises:

forming a resist layer over the first conductive layer;

patterning the resist layer to expose a portion of the first conductive layer; and

removing the exposed portion of the first conductive layer.

21. The method of claim 19 , wherein the second conductive layer is formed using an electrochemical deposition.

22. The method of claim 10 , wherein separating the substrate comprises thinning the substrate from the back side.

23. The method of claim 10 , wherein the first conductive layer is formed having tapered sidewalls using an anisotropic deposition process, wherein the first conductive layer has a maximum thickness adjacent the top surface.

24. A method of forming a semiconductor device, the method comprising:

forming a first trench in a substrate, the substrate having a front side and an opposite back side, the first trench having sidewalls extending from a top surface to a bottom surface;

forming an insulator layer over the sidewalls and the bottom surface of the first trench;

forming a conductive liner over the insulator layer;

forming a first conductive layer over a top portion of the sidewalls of the first trench;

forming a second trench in the substrate from the front side, the second trench extending into the substrate from an opening in a bottom surface of the conductive liner through the bottom surface of the first trench, the second trench having a smaller critical dimension than the first trench; and

separating the substrate along the first trench.

25. The method of claim 24 , wherein forming a first conductive layer comprises:

filling a bottom portion of the trench with a fill material, the fill material covering a portion of the conductive liner;

forming the first conductive layer over an exposed conductive liner; and

removing the fill material.

26. The method of claim 25 , filling a bottom portion of the trench comprises filling a central region of the bottom portion of the first trench without covering the sidewalls of the trench.

27. The method of claim 25 , filling a bottom portion of the first trench comprises covering the sidewalls of the first trench in the bottom portion.

28. The method of claim 24 , wherein forming a first conductive layer comprises sputtering metal atoms into the first trench, wherein the sputtering does not form the first conductive layer in a bottom portion of the first trench.

29. The method of claim 24 , forming a second conductive layer comprises:

forming a resist layer over the first conductive layer;

patterning the resist layer to expose a portion of the first conductive layer; and

removing the exposed portion of the first conductive layer.

30. The method of claim 24 , wherein the first conductive layer is formed having tapered sidewalls using an anisotropic deposition process, wherein the first conductive layer has a maximum thickness adjacent the top surface.

31. The method of claim 24 , wherein the second trench is narrower than the first trench.

32. The method of claim 24 , separating the substrate along the first trench comprises thinning the substrate up to the bottom surface of the first trench from the back side.