IP Library › Granted Patent US 8,174,021
Granted Patent B2
US 8,174,021 · App. 12/695,179 · Granted May 8, 2012

Semiconductor device and method of manufacturing the semiconductor device

Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,174,021
App. No.
12/695,179
Granted
May 8, 2012
Kind
B2
Abstract

An object is to provide a semiconductor device provided with a thin film transistor having excellent electric characteristics using an oxide semiconductor layer. An In—Sn—O-based oxide semiconductor layer including SiO X is used for a channel formation region. In order to reduce contact resistance between the In—Sn—O-based oxide semiconductor layer including SiO X and a wiring layer formed from a metal material having low electric resistance, a source region or drain region is formed between a source electrode layer or drain electrode layer and the In—Sn—O-based oxide semiconductor layer including SiO X . The source region or drain region and a pixel region are formed using an In—Sn—O-based oxide semiconductor layer which does not include SiO X .

Claims (30)

1. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer;

a first oxide semiconductor layer including In, Sn, and SiO x ;

a source region and a drain region which are in contact with the first oxide semiconductor layer; and

a pixel electrode,

wherein the source region or the drain region and the pixel electrode are formed from a second oxide semiconductor layer including In, Sn, and O.

2. A semiconductor device according to claim 1 , wherein conductivity of the first oxide semiconductor layer is less than or equal to 1.6×10 −3 S/cm.

3. A semiconductor device according to claim 1 , wherein the first oxide semiconductor layer is amorphous.

4. A semiconductor device according to claim 1 , wherein the first oxide semiconductor layer is formed by a sputtering method using an oxide semiconductor target including In, Sn, Si and O where a concentration of SiO 2 is 5 wt % or higher and 50 wt % or lower.

5. A semiconductor device according to claim 1 , further comprising a liquid crystal layer interposed between the pixel electrode and a counter electrode.

6. A semiconductor device according to claim 1 , further comprising a light-emitting layer provided over an anode provided in the pixel electrode, and a cathode provided over the light-emitting layer.

7. A semiconductor device according to claim 1 , further comprising a light-emitting layer provided over a cathode provided in the pixel electrode, and an anode provided over the light-emitting layer.

8. A semiconductor device according to claim 1 , wherein nitrogen is added to the second oxide semiconductor layer.

9. A semiconductor device according to claim 1 , wherein a channel region is provided in the first oxide semiconductor layer.

10. A semiconductor device comprising:

a gate electrode layer over a substrate having an insulating surface;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor layer including In, Sn, and SiO x over the gate insulating layer;

a source region and a drain region which are in contact with the first oxide semiconductor layer; and

a pixel electrode,

wherein the source region or the drain region and the pixel electrode are formed from a second oxide semiconductor layer including In, Sn, and O.

11. A semiconductor device according to claim 10 , wherein conductivity of the first oxide semiconductor layer is less than or equal to 1.6×10 −3 S/cm.

12. A semiconductor device according to claim 10 , wherein the first oxide semiconductor layer is amorphous.

13. A semiconductor device according to claim 10 , wherein the first oxide semiconductor layer is formed by a sputtering method using an oxide semiconductor target including In, Sn, Si and O where a concentration of SiO 2 is 5 wt % or higher and 50 wt % or lower.

14. A semiconductor device according to claim 10 , further comprising a liquid crystal layer interposed between the pixel electrode and a counter electrode.

15. A semiconductor device according to claim 10 , further comprising a light-emitting layer provided over an anode provided in the pixel electrode, and a cathode provided over the light-emitting layer.

16. A semiconductor device according to claim 10 , further comprising a light-emitting layer provided over a cathode provided in the pixel electrode, and an anode provided over the light-emitting layer.

17. A semiconductor device according to claim 10 , wherein nitrogen is added to the second oxide semiconductor layer.

18. A semiconductor device according to claim 10 , wherein a channel region is provided in the first oxide semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2010
From: OIKAWA, YOSHIAKI; MARUYAMA, HOTAKA; GODO, HIROMICHI; KAWAE, DAISUKE; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 023860/0805 →
Priority Claims (1)
JP 2009-026482 · Feb 6, 2009 · national
Continuity (1)
Related Publication 20100200851A1 · Aug 12, 2010