A/D converter and solid-state imaging device
According to one embodiment, an A/D converter includes a determination circuit configured to determine whether a first analog signal is greater than a second analog signal or not, the first analog signal being a present A/D conversion target, the second analog signal being an immediately preceding A/D conversion target, a calculation circuit configured to add a reference voltage to a difference obtained by subtracting the second analog signal from the first analog signal, a generation circuit configured to generate a comparison voltage, a comparator configured to compare a calculated value of the calculation circuit with the comparison voltage, and a conversion circuit configured to convert a period into a digital signal, the period being required until the calculated value is identical with the comparison voltage by the comparator.
1. An analog to digital (A/D) converter comprising:
a determination circuit configured to determine whether a first analog signal is greater than a second analog signal or not, the first analog signal being a present A/D conversion target, the second analog signal being an immediately preceding A/D conversion target;
a calculation circuit configured to add a reference voltage to a difference obtained by subtracting the second analog signal from the first analog signal;
a generation circuit configured to generate a comparison voltage rising from the reference voltage as an initial value if the first analog signal is greater than the second analog signal, and to generate a comparison voltage falling from the reference voltage as the initial value if the first analog signal is smaller than the second analog signal;
a comparator configured to compare a calculated value of the calculation circuit with the comparison voltage; and
a conversion circuit configured to convert a period into a digital signal, the period being required until the calculated value is identical with the comparison voltage by the comparator.
2. The A/D converter of claim 1 , further comprising a hold circuit configured to hold the second analog signal.
3. The A/D converter of claim 1 , wherein
the conversion circuit comprises a counter which counts a clock during the period, and
the digital signal is a count value of the counter.
4. The A/D converter of claim 1 , further comprising a detection circuit configured to detect a time point when the calculated value is identical with the comparison voltage by the comparator, and to generate an end-of-conversion signal,
wherein the conversion circuit performs a conversion operation, based on the end-of-conversion signal.
5. The A/D converter of claim 1 , wherein the first and second analog signals are pixel signals of a solid-state imaging device.
6. A solid-state imaging device comprising:
a pixel array in which a plurality of pixels each comprising a photoelectric element are arrayed;
a voltage generator configured to generate a reference voltage; and
an A/D converter configured to A/D-convert pixel signals from the pixel array,
the A/D converter comprising:
a determination circuit configured to determine whether a first analog signal is greater than a second analog signal or not, the first analog signal being a pixel signal as a present A/D conversion target, the second analog signal being a pixel signal as an immediately preceding A/D conversion target;
a calculation circuit configured to add a reference voltage to a difference obtained by subtracting the second analog signal from the first analog signal;
a generation circuit configured to generate a comparison voltage rising from the reference voltage as an initial value if the first analog signal is greater than the second analog signal, and to generate a comparison voltage falling from the reference voltage as the initial value if the first analog signal is smaller than the second analog signal;
a comparator configured to compare a calculated value of the calculation circuit with the comparison voltage; and
a conversion circuit configured to convert a period into a digital signal, the period being required until the calculated value is identical with the comparison voltage by the comparator.
7. An analog to digital (A/D) converter comprising:
a determination circuit configured to determine whether a first analog signal is greater than a second analog signal or not, the first analog signal being a present A/D conversion target, the second analog signal being an immediately preceding A/D conversion target;
a generation circuit configured to generate a comparison voltage rising from the second analog signal as an initial value if the first analog signal is greater than the second analog signal, and to generate a comparison voltage falling from the second analog signal as the initial value if the first analog signal is smaller than the second analog signal;
a comparator configured to compare the first analog signal with the comparison voltage; and
a conversion circuit configured to convert a period into a digital signal, the period being required until the first analog signal is identical with the comparison voltage by the comparator.
8. The A/D converter of claim 7 , further comprising a digital-to-analog (D/A) converter configured to convert, into an analog signal, a digital signal into which the second analog signal has been A/D-converted,
wherein the second analog signal is a signal converted by the D/A converter.
9. The A/D converter of claim 7 , wherein
the conversion circuit comprises a counter which counts a clock during the period, and
the digital signal is a count value of the counter.
10. The A/D converter of claim 7 , further comprising a detection circuit configured to detect a time point when the first analog signal is identical with the comparison voltage by the comparator, and to generate an end-of-conversion signal,
wherein the conversion circuit performs a conversion operation, based on the end-of-conversion signal.
11. The A/D converter of claim 7 , wherein the first and second analog signals are pixel signals of a solid-state imaging device.
12. An analog to digital (A/D) converter comprising:
a determination circuit configured to determine whether a first analog signal is greater than a second analog signal or not, the first analog signal being a present A/D conversion target, the second analog signal being an immediately preceding A/D conversion target;
a calculation circuit configured to add a reference voltage to a difference obtained by subtracting the second analog signal from the first analog signal;
a generation circuit configured to generate a comparison voltage rising from the reference voltage as an initial value if the first analog signal is greater than the second analog signal, and to generate a comparison voltage falling from the reference voltage as the initial value if the first analog signal is smaller than the second analog signal;
a comparator configured to compare a calculated value of the calculation circuit with the comparison voltage; and
a first hold circuit configured to hold a digital signal of the comparison voltage at a time point when the calculated value is identical with the comparison voltage by the comparator, the held digital signal being a digital signal into which the first analog signal has been A/D converted.
13. The A/D converter of claim 12 , further comprising a D/A converter configured to convert the digital signal of the comparison voltage into an analog signal,
wherein the comparator uses the analog signal of the comparison voltage.
14. The A/D converter of claim 12 , further comprising a second hold circuit configured to hold the second analog signal.
15. The A/D converter of claim 12 , wherein
the generation circuit comprises a counter which counts a clock with the reference voltage as a preset value during a period required until the calculated value is identical with the comparison voltage by the comparator, and
the digital signal of the comparison voltage is a count value of the counter.
16. The A/D converter of claim 12 , further comprising a detection circuit configured to detect the time point, and to generate an end-of-conversion signal,
wherein the first hold circuit performs a hold operation, based on the end-of-conversion signal.
17. An analog to digital (A/D) converter comprising:
a determination circuit configured to determine whether a first analog signal is greater than a second analog signal or not, the first analog signal being a present A/D conversion target, the second analog signal being an immediately preceding A/D conversion target;
a generation circuit configured to generate a comparison voltage rising from the second analog signal as an initial value if the first analog signal is greater than the second analog signal, and to generate a comparison voltage falling from the second analog signal as the initial value if the first analog signal is smaller than the second analog signal;
a comparator configured to compare the first analog signal with the comparison voltage; and
a hold circuit configured to hold a digital signal of the comparison voltage at a time point when the first analog signal is identical with the comparison voltage by the comparator, the held digital signal being a digital signal into which the first analog signal has been A/D converted.
18. The A/D converter of claim 17 , further comprising a D/A converter configured to convert the digital signal of the comparison voltage into an analog signal,
wherein the comparator uses the analog signal of the comparison voltage.
19. The A/D converter of claim 17 , wherein
the generation circuit comprises a counter which counts a clock with the second analog signal as a preset value during a period required until the first analog signal is identical with the comparison voltage by the comparator, and
the digital signal of the comparison voltage is a count value of the counter.
20. The A/D converter of claim 17 , further comprising a detection circuit configured to detect the time point, and to generate an end-of-conversion signal,
wherein the hold circuit performs a hold operation, based on the end-of-conversion signal.