IP Library Granted Patent US 8,183,932
Granted Patent B2
US 8,183,932 · App. 12/718,570 · Granted May 22, 2012

Method and system for processing signals via an integrated low noise amplifier having configurable input signaling mode

Assignee: Broadcom Corporation
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Quick Facts
Patent No.
US 8,183,932
App. No.
12/718,570
Granted
May 22, 2012
Kind
B2
Abstract

Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. In this regard, one or more circuits comprising an integrated amplifier may be configurable such that, in a first configuration, the one or more circuits are operable to handle a differential input signal, and, in a second mode of operation, the one or more circuits are operable to handle a single-ended input signal. The one or more circuits may output a differential signal when handling a differential input signal and when handling a single-ended input signal. In some instances, whether the one or more circuits are operable to handle a differential input signal or a single-ended input signal may determined by an inductance of a bond wire coupling the integrated amplifier to an integrated circuit package.

Claims (46)

1. A system for signal processing, the system comprising:

one or more circuits comprising an integrated low noise amplifier, said one or more circuits being configurable during operation such that:

in a first configuration, said one or more circuits are operable to amplify a differential radio-frequency input signal;

in a second configuration, said one or more circuits are operable to amplify a single-ended radio-frequency input signal; and

wherein an inductance between an input of said integrated low noise amplifier and a reference point comprises a first inductance for said first configuration and comprises a second inductance for said second configuration.

2. The system according to claim 1 , wherein said one or more circuits output a differential signal when processing said differential radio-frequency input signal and when processing said single-ended radio-frequency input signal.

3. The system according to claim 1 , wherein a voltage applied to a bias point of said one or more circuits comprises a first voltage for said first configuration and comprises a second voltage for said second configuration.

4. The system according to claim 1 , wherein said inductance comprises the inductance of a bond wire which communicatively couples said integrated low noise amplifier to an integrated circuit package.

5. The system according to claim 1 , wherein said inductance is fabricated on a common substrate with said integrated low noise amplifier.

6. The system according to claim 1 , wherein a first bias voltage and a second bias voltage are available to said one or more circuits, and said first bias voltage is different than said second bias voltage.

7. The system according to claim 1 , wherein said circuits comprise a center-tapped differential inductor that is coupled to an output terminal of said integrated low-noise amplifier.

8. A system for signal processing, the system comprising:

one or more circuits comprising an integrated low noise amplifier, said one or more circuits being configurable during operation such that:

in a first configuration, said one or more circuits are operable to amplify a differential radio-frequency input signal;

in a second configuration, said one or more circuits are operable to amplify a single-ended radio-frequency input signal;

wherein a first bias voltage and a second bias voltage are available to said one or more circuits, and said first bias voltage is different than said second bias voltage; and

wherein, for said first configuration, a first input terminal of said integrated low noise amplifier is communicatively coupled to a reference voltage via an inductance and a bias point of said integrated low noise amplifier is communicatively coupled to said first bias voltage.

9. The system according to claim 8 , wherein, for said second configuration, a first input terminal and a second input terminal of said integrated low noise amplifier are communicatively coupled to said differential radio-frequency input signal and a bias point of said integrated low noise amplifier is communicatively coupled to said second bias voltage.

10. A system for signal processing, the system comprising:

one or more circuits comprising an integrated amplifier, said one or more circuits being configurable during operation to amplify a single-ended or differential input signal, wherein:

for amplifying said single-ended input signal, a first input terminal of said integrated amplifier is communicatively coupled to a reference voltage via an inductance and a bias point of said integrated amplifier is communicatively coupled to a first bias voltage;

wherein, for amplifying said differential input signal, said first input terminal of said integrated amplifier is communicatively coupled to said differential input signal and a bias point is communicatively coupled to a second bias voltage; and

wherein said reference voltage is zero volts DC, said first bias voltage is zero volts DC, and said second bias voltage is a non-zero voltage.

11. The system according to claim 10 , wherein said one or more circuits output a differential signal when amplifying said differential input signal and when amplifying said single-ended input signal.

12. A system for signal processing, the system comprising:

one or more circuits comprising an integrated amplifier, said one or more circuits being configurable during operation to switch between a first configuration in which said one or more circuits amplify a differential input signal and a second configuration in which said one or more circuits amplify a single-ended input signal, wherein:

for amplifying said differential input signal, a first input terminal and a second input terminal of said integrated amplifier are communicatively coupled to said differential input signal and a bias point is communicatively coupled to a first bias voltage; and

wherein, for amplifying said single-ended input signal, a first input terminal of said integrated amplifier is communicatively coupled to ground via an inductance and a bias point of said integrated amplifier is communicatively coupled to a second bias voltage.

13. The system according to claim 12 , wherein said reference voltage is zero volts DC, said first bias voltage is zero volts DC, and said second bias voltage is a non-zero DC voltage.

14. A system for signal processing, the system comprising:

one or more circuits comprising an integrated amplifier, said one or more circuits being configurable such that:

in a first configuration, said one or more circuits are operable to amplify a differential input signal, and a voltage applied to a bias point of said one or more circuits comprises a first voltage;

in a second configuration, said one or more circuits are operable to amplify a single-ended input signal, and a voltage applied to said bias point of said one or more circuits comprises a second voltage; and

wherein an inductance between an input of said integrated amplifier and a reference point comprises a first inductance for said first configuration and comprises a second inductance for said second configuration.

15. The system according to claim 14 , wherein said inductance comprises the inductance of a bond wire which communicatively couples said integrated amplifier to an integrated circuit package.

16. The system according to claim 14 , wherein said inductance is fabricated on a common substrate with said integrated amplifier.

17. The system according to claim 14 , wherein a first bias voltage and a second bias voltage are available to said one or more circuits, and said first bias voltage is different than said second bias voltage.

18. The system according to claim 17 , wherein, for said first configuration, a first input terminal of said integrated amplifier is communicatively coupled to a reference voltage via an inductance and a bias point of said integrated amplifier is communicatively coupled to said first bias voltage.

19. The system according to claim 17 , wherein, for said second configuration, a first input terminal and a second input terminal of said integrated amplifier are communicatively coupled to said differential input signal and a bias point of said integrated amplifier is communicatively coupled to said second bias voltage.

20. The system according to claim 14 , wherein said circuits comprise a center-tapped differential inductor that is coupled to an output terminal of said integrated amplifier.

21. A system for signal processing, the system comprising:

one or more circuits comprising an integrated amplifier, said one or more circuits being configurable to handle a single-ended or differential input signal, wherein:

for handling said single-ended input signal, a first input terminal of said integrated amplifier is communicatively coupled to a reference voltage via an inductance and a bias point of said integrated amplifier is communicatively coupled to a first bias voltage;

for handling said differential input signal, said first input terminal of said integrated amplifier is communicatively coupled to said differential input signal and a bias point is communicatively coupled to a second bias voltage; and

wherein said reference voltage is zero volts DC, said first bias voltage is zero volts DC, and said second bias voltage is a non-zero voltage.

22. The system according to claim 21 , wherein said one or more circuits output a differential signal when handling said differential input signal and when handling said single-ended input signal.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 09/05/2018 PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0133. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0456 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0133 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2012
From: ZOLFAGHARI, ALIREZA
To: BROADCOM CORPORATION
Reel/Frame 028072/0028 →
Continuity (3)
Continuation 12192976 · Aug 15, 2008
Provisional Application 61073940 · Jun 19, 2008
Related Publication 20100182089A1 · Jul 22, 2010