IP Library Granted Patent US 8,199,521
Granted Patent B2
US 8,199,521 · App. 11/925,547 · Granted Jun 12, 2012

Memory module and method for operating a memory module

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Quick Facts
Patent No.
US 8,199,521
App. No.
11/925,547
Granted
Jun 12, 2012
Kind
B2
Abstract

A memory module includes an electronic printed circuit board with at least one contact strip, a plurality of integrated memory components, at least one first and one second buffer component, and a number of conductor tracks, which proceed from the contact strip and which are arranged on or in the printed circuit board. The conductor tracks include data lines, control lines and address lines. The conductor tracks lead from the contact strip to the buffer components or to one of the buffer components. The printed circuit board has conductor tracks that are interposed between the first buffer component and the second buffer component and that lead from the first buffer component to the second buffer component.

Claims (43)

1. A memory module comprising:

a printed circuit board with a contact strip;

a plurality of integrated memory components attached to the printed circuit board;

a first buffer component attached to the printed circuit board;

a second buffer component attached to the printed circuit board;

a plurality of conductor tracks arranged on or in the printed circuit board, the conductor tracks comprising data lines, control lines and address lines, wherein the conductor tracks connect the contact strip to the first buffer component and to the second buffer component; and

further conductor tracks arranged on or in the printed circuit board, the further conductor tracks being interposed only between the first buffer component and the second buffer component to transmit signals between the first buffer component and the second buffer component; and

wherein the first buffer component is configured to only receive signals on the conductor tracks connected to the first buffer component and the second buffer component is configured to only transmit signals on the conductor tracks connected to the second buffer component.

2. The memory module as claimed in claim 1 , wherein the first and second buffer components are connected such that output signals of the first buffer component are sequentially communicated to the contact strip via the further conductor tracks, the second buffer component and at least one of the conductor tracks, and such that the second buffer component receives input signals sequentially communicated from the contact strip via at least one of the conductor tracks, via the first buffer component and the further conductor tracks.

3. The memory module as claimed in claim 1 , wherein the first and second buffer components are connected such that both input signals intended for the second buffer component and output signals from the second buffer component are conducted via the first buffer component and the further conductor tracks.

4. The memory module as claimed in claim 1 , wherein the plurality of conductor tracks comprise first conductor tracks which couple the first buffer component to the contact strip and second conductor tracks which connect the second buffer component to the contact strip.

5. The memory module as claimed in claim 4 , wherein the first conductor tracks and the second conductor tracks each comprise data lines, control lines and address lines by which the respective buffer component is coupled to the contact strip.

6. The memory module as claimed in claim 1 , wherein the first and second buffer components are both arranged on a main surface of the printed circuit board along two different sections of the contact strip.

7. The memory module as claimed in claim 1 , wherein the first buffer component and the second buffer component are both arranged on a main surface of the printed circuit board along the same section of the contact strip and are at distances of different magnitudes from the contact strip.

8. A memory module comprising:

a printed circuit board;

a first contact strip arranged along a first edge of the printed circuit board;

a second contact strip arranged along a second edge of the printed circuit board;

a plurality of integrated memory components attached to the printed circuit board;

a first buffer component attached to the printed circuit board;

a second buffer component attached to the printed circuit board;

a plurality of conductor tracks arranged on or in the printed circuit board, the conductor tracks comprising data lines, control lines and address lines, wherein the conductor tracks connect the first contact strip to the first buffer component and to the second buffer component; and

connecting lines that connect the first buffer component and the second buffer component to the second contact strip, wherein the second contact strip is configured to couple to a further memory module having a plurality of integrated memory components and without buffer and/or register components.

9. The memory module as claimed in claim 8 , wherein the connecting lines comprise data lines, control lines and address lines.

10. A memory module comprising:

a printed circuit board with at least one contact strip;

a plurality of integrated memory components attached to the printed circuit board;

a first buffer component attached to the printed circuit board;

a second buffer component attached to the printed circuit board, wherein the second buffer component comprises a switching device for altering an assignment of external contact terminals of the second buffer component;

a plurality of conductor tracks arranged on or in the printed circuit board, the conductor tracks comprising data lines, control lines and address lines, wherein the conductor tracks connect the at least one contact strip and at least one of the first buffer component and the second buffer component; and

wherein, the switching device is configured to switch from, based on a preset parameter and an applied voltage, a first configuration where input terminals of the second buffer component are connected to buffer-internal input signal lines and output terminals of the second buffer component are connected to buffer-internal output signal lines to a second configuration where the buffer-internal output signal lines are connected to the input terminals and the buffer-internal input signal lines are connected to the output terminals.

11. The memory module as claimed in claim 10 , wherein the first buffer component and the second buffer component are arranged on opposite main surfaces of the printed circuit board.

12. The memory module as claimed in claim 10 , wherein the first buffer component and the second buffer component are arranged along the same section of the contact strip.

13. The memory module as claimed in claim 10 , wherein the at least one contact strip comprises a plurality of contact terminals on two main surfaces of the printed circuit board.

14. A memory module comprising:

a printed circuit board with at least one contact strip;

a plurality of memory components attached to the printed circuit board;

a buffer component attached to the printed circuit board;

first conductor tracks connecting the buffer component to the at least one contact strip, the first conductor tracks including data lines, address lines and command lines;

two register components;

second conductor tracks connecting a respective one of the two register components to the buffer component, the second conductor tracks including address lines and command lines;

third conductor tracks connecting the memory components to a respective one of the two register components, the third conductor tracks including address lines and command lines; and

fourth conductor tracks connecting the memory components to the buffer component, the fourth conductor tracks including data lines.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 037171/0719 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 037147/0487 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →