IP Library Granted Patent US 8,207,762
Granted Patent B2
US 8,207,762 · App. 12/683,194 · Granted Jun 26, 2012

Digital time base generator and method for providing a first clock signal and a second clock signal

Assignee: Siemens Milltronics Process Instruments, Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,207,762
App. No.
12/683,194
Granted
Jun 26, 2012
Kind
B2
Abstract

A digital time base generator and method for providing a first clock signal and a second clock signal in which a base clock signal having a base frequency is generated to provide two clock signals of slightly different frequencies with defined time or phase delay. Here, the base frequency is divided by a first integer to produce a first auxiliary signal, the frequency of the first auxiliary signal is multiplied by a factor to obtain the first clock signal, the base frequency is further divided by a second integer to produce a second auxiliary signal, and the frequency of the second auxiliary signal is multiplied by the factor to obtain the second clock signal.

Claims (18)

1. A digital time base generator arranged in one of a radar, a laser and time domain reflectometer, the digital time base generator providing a first clock signal and a second clock signal, frequencies of the first and second clock signals being different, the time base generator comprising:

a base clock signal generator which provides a base clock signal at a base frequency;

a first frequency divider which divides the base frequency by a first integer to produce a first auxiliary signal;

a first frequency multiplier which multiplies the frequency of the first auxiliary signal by a factor to generate the first clock signal;

a second frequency divider which divides the base frequency by a second integer to produce a second auxiliary signal; and

a second frequency multiplier which multiplies the frequency of the second auxiliary signal by the factor to generate the second clock signal.

2. The digital time base generator of claim 1 incorporated into a radar, laser or time-domain reflectometer, wherein the first clock signal triggers a transmitter to produce a transmit signal and wherein the second clock signal one of gates and is mixed with detected echoes of the transmit signal.

3. The digital time base generator of claim 1 , wherein each of the first and second frequency multipliers comprises a phase-locked loop.

4. The digital time base generator of claim 3 incorporated into one of a radar, laser and time-domain reflectometer, wherein the first clock signal triggers a transmitter to produce a transmit signal and wherein the second clock signal one of gates and is mixed with detected echoes of the transmit signal.

5. A method implemented in one of a radar, a laser and time domain reflectometer and for providing a first clock signal and a second clock signal, frequencies of the clock signals being different, said method comprising:

providing, by a base clock signal generator, a base clock signal having a base frequency;

dividing, by a first frequency divider, the base frequency by a first integer to produce a first auxiliary signal;

multiplying, by a first frequency multiplier, a frequency of the first auxiliary signal by a factor to obtain the first clock signal;

dividing, by a second frequency divider, the base frequency by a second integer to produce a second auxiliary signal; and

multiplying, by a second frequency divider, the frequency of the second auxiliary signal by the factor to obtain the second clock signal.

6. The method of claim 5 , wherein the first clock signal triggers a transmitter to produce a transmit signal and wherein the second clock signal one of gates and is mixed with detected echoes of the transmit signal.

7. The method of claim 5 , wherein each of the frequency multiplication is performed by a phase-locked loop.

8. The method of claim 7 , wherein the first clock signal triggers a transmitter to produce a transmit signal and wherein the second clock signal one of gates and is mixed with detected echoes of the transmit signal.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: SIEMENS CANADA LIMITED
To: SIEMENS AKTIENGESELLSCHAFT
Reel/Frame 027557/0304 →
CERTIFICATE AND ARTICLES OF AMALGAMATION Recorded Jan 12, 2012
From: SIEMENS MILLTRONICS PROCESS INSTRUMENTS, INC.
To: SIEMENS CANADA LIMITED
Reel/Frame 027531/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2010
From: BURCEA, GEORGE
To: SIEMENS MILLTRONICS PROCESS INSTRUMENTS, INC.
Reel/Frame 023945/0015 →
Priority Claims (1)
EP 09000149 · Jan 8, 2009 · regional
Continuity (1)
Related Publication 20100201408A1 · Aug 12, 2010