IP Library Granted Patent US 8,209,521
Granted Patent B2
US 8,209,521 · App. 12/253,966 · Granted Jun 26, 2012

Methods of indirect register access including automatic modification of a directly accessible address register

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 8,209,521
App. No.
12/253,966
Granted
Jun 26, 2012
Kind
B2
Abstract

Systems and methods are provided for managing access to registers. A system may include a set of direct registers and a set of indirect registers. The indirect registers may be accessed through the direct registers, and the direct registers may provide various features to provide faster access to the indirect registers. One of the direct registers may indicate access modes for accessing the indirect registers. The access modes may include auto-increment, auto-decrement, auto-reset, and no change modes. Based on the access mode, the currently accessed address may be automatically modified after accessing the indirect register at the address.

Claims (32)

1. A method of accessing registers, comprising:

directly accessing a first set of registers;

indirectly accessing a second set of registers via the first set of registers; and

selecting one of a plurality of auto-change modes based on a first register of the first set of registers, wherein accessing the first register of the first set of registers sets a second register of the first set of registers to a predetermined value, wherein the plurality of auto-change modes comprises:

an auto-increment mode in which a first address stored in the second register of the first set of registers is incremented at the completion of a bus cycle;

an auto-decrement mode in which a first address stored in the second register of the first set of registers is decremented at the completion of the bus cycle; and

an auto-reset mode in which the second register is set to a predetermined value at the completion of the bus cycle.

2. The method of claim 1 , wherein accessing the second set of registers comprises accessing a third register in the second set of registers via a first address stored in the second register of the first set of registers.

3. The method of claim 2 , comprising incrementing a first address to access a fourth register.

4. The method of claim 2 , comprising decrementing a first address to access a fourth register.

5. The method of claim 2 , comprising automatically modifying a value stored in the second register in accordance with a logical function.

6. The method of claim 5 , wherein the logical function includes at least one of an OR function, an AND function, or an XOR function.

7. A method comprising:

directly accessing a first set of registers;

indirectly accessing a second set of registers via the first set of registers, wherein accessing the second set of registers comprises accessing a second register via a first address stored in an address register of the first set of registers; and

automatically modifying the value stored in the address register in accordance with a hash function.

8. A method of processing data, comprising:

executing a first cycle, comprising:

writing a bank address to a first register of a first set of registers;

setting a register address of a second register of the first set of registers;

accessing a third register of a second set of registers indicated by the bank address and the register address; and

reading an auto-change mode from the first register; and

executing a second cycle, comprising:

automatically modifying the register address of the second register in accordance with the auto-change mode read from the first register;

wherein setting the register address of the second register includes setting the register address to a predetermined value; and

wherein setting the register address to the predetermined value is automatically performed in response to writing the bank address to the first register.

9. The method of claim 8 , wherein setting the register address includes writing the register address to the second register.

10. The method of claim 8 , comprising executing a third cycle, comprising accessing a fourth register of the second set of registers indicated by the bank address and the automatically modified register address.

11. The method of claim 8 , wherein automatically modifying the register address includes incrementing the register address.

12. The method of claim 8 , wherein automatically modifying the register address includes decrementing the register address.

13. The method of claim 8 , wherein accessing the third register includes reading data stored in the third register.

14. The method of claim 8 , wherein accessing the third register includes writing data from an additional register of the first set of registers to the third register.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2008
From: NOYES, HAROLD B; JURENKA, MARK; HUGGINS, GAVIN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 021705/0279 →
Continuity (1)
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