Equalizer
Methods and apparatus to provide an equalizer for analog adaptive control are disclosed. An example equalizer described herein includes a high frequency amplifier to receive an input signal and to amplify a high frequency portion of the input signal, a low frequency amplifier to receive the input signal and to amplify a low frequency portion of the input signal, and a weight factor controller to control a gain of the high frequency amplifier and a gain of the low frequency amplifier.
1. An apparatus comprising:
a weight factor controller having:
a first differential pair that generates a first current and a second current in response to a control signal;
a first current mirror that is coupled to the differential pair so as to receive the first current; and
a second current minor that is coupled to the differential pair so as to receive the second current;
a high frequency amplifier having:
a second differential pair that receives a differential input signal and that is coupled to the first current mirror; and
a resistor-capacitor (RC) network that is coupled to the second differential pair and the first current minor;
a low frequency amplifier having:
a third differential pair that receives the differential input signal and that is coupled to the second current mirror; and
a resistor that is coupled to the third differential pair and the second current minor; and
a buffer that is coupled to the high frequency amplifier and the low frequency amplifier.
2. The apparatus of claim 1 , wherein the apparatus further comprises an amplifier load that is coupled to the high and low frequency amplifiers.
3. The apparatus of claim 1 , wherein the weight factor controller further comprises a current source that is coupled to the first differential pair, and wherein the first current minor further comprises a first diode-connected transistor that is couple to the differential pair so as to receive the first current, and wherein the second current mirror further comprise a second diode-connected transistor that is coupled to the differential pair so as to receive the second current.
4. The apparatus of claim 3 , wherein the second differential pair further comprises:
a first transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the first transistor receives a first portion of the differential input signal at its control electrode; and
a second transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the second transistor receives a second portion of the differential input signal at its control electrode;
and wherein the first current minor further comprises:
a third transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the control electrode of the third transistor is coupled to the first diode-connected transistor, and wherein the first passive electrode of the third transistor is coupled to the second passive electrode of the first transistor; and
a fourth transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the control electrode of the fourth transistor is coupled to the first diode-connected transistor, and wherein the first passive electrode of the fourth transistor is coupled to the second passive electrode of the second transistor.
5. The apparatus of claim 4 , wherein the third differential pair further comprises:
a fifth transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the fifth transistor receives the first portion of the differential input signal at its control electrode; and
a sixth transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the sixth transistor receives a second portion of the differential input signal at its control electrode;
and wherein the second current minor further comprises:
a seventh transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the control electrode of the seventh transistor is coupled to the second diode-connected transistor, and wherein the first passive electrode of the seventh transistor is coupled to the second passive electrode of the fifth transistor; and
a eighth transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the control electrode of the eighth transistor is coupled to the second diode-connected transistor, and wherein the first passive electrode of the eighth transistor is coupled to the second passive electrode of the sixth transistor.
6. The apparatus of claim 5 , wherein the first, second, third, fourth, fifth, sixth, seventh, and eighth transistors further comprise bipolar transistors.
7. The apparatus of claim 6 , wherein the first, second, third, fourth, fifth, sixth, seventh, and eighth transistors further comprise NPN transistors.
8. An apparatus comprising:
an adaptive controller that generates a control signal; and
an equalizer having:
a weight factor controller having:
a first differential pair that is coupled to the adaptive controller so as to receives the control signal and that generates a first current and a second current in response to the control signal;
a first current mirror that is coupled to the differential pair so as to receive the first current; and
a second current mirror that is coupled to the differential pair so as to receive the second current;
a high frequency amplifier having:
a second differential pair that receives a differential input signal and that is coupled to the first current mirror; and
an RC network that is coupled to the second differential pair and the first current mirror;
a low frequency amplifier having:
a third differential pair that receives the differential input signal and that is coupled to the second current mirror; and
a resistor that is coupled to the third differential pair and the second current mirror; and
a buffer that is coupled to the high frequency amplifier and the low frequency amplifier.
9. The apparatus of claim 8 , wherein the equalizer further comprises an amplifier load that is coupled to the high and low frequency amplifiers.
10. The apparatus of claim 9 , wherein the weight factor controller further comprises a current source that is coupled to the first differential pair, and wherein the first current minor further comprises a first diode-connected transistor that is couple to the differential pair so as to receive the first current, and wherein the second current mirror further comprise a second diode-connected transistor that is coupled to the differential pair so as to receive the second current.
11. The apparatus of claim 10 , wherein the second differential pair further comprises:
a first transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the first transistor receives a first portion of the differential input signal at its control electrode; and
a second transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the second transistor receives a second portion of the differential input signal at its control electrode;
and wherein the first current minor further comprises:
a third transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the control electrode of the third transistor is coupled to the first diode-connected transistor, and wherein the first passive electrode of the third transistor is coupled to the second passive electrode of the first transistor; and
a fourth transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the control electrode of the fourth transistor is coupled to the first diode-connected transistor, and wherein the first passive electrode of the fourth transistor is coupled to the second passive electrode of the second transistor.
12. The apparatus of claim 11 , wherein the third differential pair further comprises:
a fifth transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the fifth transistor receives the first portion of the differential input signal at its control electrode; and
a sixth transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the sixth transistor receives a second portion of the differential input signal at its control electrode;
and wherein the second current minor further comprises:
a seventh transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the control electrode of the seventh transistor is coupled to the second diode-connected transistor, and wherein the first passive electrode of the seventh transistor is coupled to the second passive electrode of the fifth transistor; and
a eighth transistor having a first passive electrode, a second passive electrode, and a control electrode, wherein the control electrode of the eighth transistor is coupled to the second diode-connected transistor, and wherein the first passive electrode of the eighth transistor is coupled to the second passive electrode of the sixth transistor.
13. The apparatus of claim 12 , wherein the first, second, third, fourth, fifth, sixth, seventh, and eighth transistors further comprise bipolar transistors.
14. The apparatus of claim 13 , wherein the first, second, third, fourth, fifth, sixth, seventh, and eighth transistors further comprise NPN transistors.