IP Library Granted Patent US 8,236,635
Granted Patent B2
US 8,236,635 · App. 12/582,074 · Granted Aug 7, 2012

Method for manufacturing semiconductor device

Assignee: Semiconductor Energy Laboratory Co., Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,236,635
App. No.
12/582,074
Granted
Aug 7, 2012
Kind
B2
Abstract

In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. The etching step is performed by dry etching in which an etching gas is used.

Claims (50)

1. A method for manufacturing a semiconductor device, comprising:

forming a gate electrode layer over a substrate having an insulating surface;

stacking a gate insulating layer, an oxide semiconductor film, and a conductive film over the gate electrode layer;

forming a first mask layer over the gate insulating layer, the oxide semiconductor film, and the conductive film;

performing a first etching with the first mask layer to etch the oxide semiconductor film and the conductive film so that an oxide semiconductor layer and a conductive layer are formed;

forming a second mask layer by ashing the first mask layer; and

performing a second etching with the second mask layer to etch the oxide semiconductor layer and the conductive layer so that an oxide semiconductor layer having a depression, a source electrode layer, and a drain electrode layer are formed,

wherein the first mask layer is formed using a light-exposure mask,

wherein each of the first etching and the second etching is dry etching with use of an etching gas,

wherein the oxide semiconductor layer having the depression includes a region with a smaller thickness than a region overlapping with the source electrode layer or the drain electrode layer,

wherein first portions of the oxide semiconductor layer extend beyond outer side edges of the source electrode layer and the drain electrode layer, and

wherein the first portions of the oxide semiconductor layer are thinner than second portions of the oxide semiconductor layer, the second portions being below the source electrode layer and the drain electrode layer.

2. The method for manufacturing a semiconductor device, according to claim 1 , wherein the oxide semiconductor film includes indium, gallium, and zinc.

3. The method for manufacturing a semiconductor device, according to claim 1 , wherein the etching gas includes chlorine.

4. The method for manufacturing a semiconductor device, according to claim 3 , wherein the etching gas further includes oxygen.

5. The method for manufacturing a semiconductor device, according to claim 1 , wherein a half-tone mask or a gray-tone mask is used as the light-exposure mask.

6. A method for manufacturing a semiconductor device, comprising:

forming a gate electrode layer over a substrate having an insulating surface;

stacking a gate insulating layer, a first oxide semiconductor film, a second oxide semiconductor film, and a conductive film over the gate electrode layer;

forming a first mask layer over the gate insulating layer, the first oxide semiconductor film, the second oxide semiconductor film, and the conductive film;

performing a first etching with the first mask layer to etch the first oxide semiconductor film, the second oxide semiconductor film, and the conductive film so that a first oxide semiconductor layer, a second oxide semiconductor layer, and a conductive layer are formed;

forming a second mask layer by ashing the first mask layer; and

performing a second etching with the second mask layer to etch the first oxide semiconductor layer, the second oxide semiconductor layer, and the conductive layer so that an oxide semiconductor layer having a depression, a source region, a drain region, a source electrode layer, and a drain electrode layer are formed,

wherein the first mask layer is formed using a light-exposure mask,

wherein each of the first etching and the second etching is dry etching with use of an etching gas,

wherein the oxide semiconductor layer having the depression includes a region with a smaller thickness than a region overlapping with the source region or the drain region,

wherein first portions of the oxide semiconductor layer extend beyond outer side edges of the source electrode layer and the drain electrode layer, and

wherein the first portions of the oxide semiconductor layer are thinner than second portions of the oxide semiconductor layer, the second portions being below the source electrode layer and the drain electrode layer.

7. The method for manufacturing a semiconductor device, according to claim 6 , wherein the first oxide semiconductor film has lower electrical conductivity than the second oxide semiconductor film.

8. The method for manufacturing a semiconductor device, according to claim 6 , wherein the etching gas includes chlorine.

9. The method for manufacturing a semiconductor device, according to claim 8 , wherein the etching gas further includes oxygen.

10. The method for manufacturing a semiconductor device, according to claim 6 , wherein each of the first oxide semiconductor film and the second oxide semiconductor film includes indium, gallium, and zinc.

11. The method for manufacturing a semiconductor device, according to claim 6 , wherein a half-tone mask or a gray-tone mask is used as the light-exposure mask.

12. A method for manufacturing a semiconductor device, comprising:

forming a gate electrode layer over a substrate having an insulating surface;

stacking a gate insulating layer, an oxide semiconductor film, and a conductive film over the gate electrode layer;

forming a first mask layer over the gate insulating layer, the oxide semiconductor film, and the conductive film;

performing a first etching with the first mask layer to etch the oxide semiconductor film and the conductive film so that an oxide semiconductor layer and a conductive layer are formed;

forming a second mask layer by ashing the first mask layer;

performing a second etching with the second mask layer to etch the oxide semiconductor layer and the conductive layer so that an oxide semiconductor layer having a depression, a source electrode layer, and a drain electrode layer are formed; and

performing an oxygen radical treatment on the oxide semiconductor layer having the depression,

wherein the first mask layer is formed using a light-exposure mask,

wherein each of the first etching and the second etching is dry etching with use of an etching gas, and

wherein the oxide semiconductor layer having the depression includes a region with a smaller thickness than a region overlapping with the source electrode layer or the drain electrode layer.

13. The method for manufacturing a semiconductor device, according to claim 12 , wherein the oxide semiconductor film includes indium, gallium, and zinc.

14. The method for manufacturing a semiconductor device, according to claim 12 , wherein the etching gas includes chlorine.

15. The method for manufacturing a semiconductor device, according to claim 14 , wherein the etching gas further includes oxygen.

16. The method for manufacturing a semiconductor device, according to claim 12 , wherein a half-tone mask or a gray-tone mask is used as the light-exposure mask.

17. The method according to claim 12 , wherein the oxygen radical treatment is performed in an atmosphere of O 2 or N 2 O.

18. The method according to claim 12 , wherein the oxygen radical treatment is performed with no bias voltage applied to the substrate side.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2009
From: SUZAWA, HIDEOMI; SASAGAWA, SHINYA; MURAOKA, TAIGA
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 023395/0323 →
Priority Claims (1)
JP 2008-274515 · Oct 24, 2008 · national
Continuity (1)
Related Publication 20100105162A1 · Apr 29, 2010