IP Library Granted Patent US 8,243,523
Granted Patent B2
US 8,243,523 · App. 12/720,239 · Granted Aug 14, 2012

Sensing operations in a memory device

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 8,243,523
App. No.
12/720,239
Granted
Aug 14, 2012
Kind
B2
Abstract

Methods for sensing, method for programming, memory devices, and memory systems are disclosed. In one such method for sensing, a counting circuit generates a count output and a translated count output. The count output is converted into a time varying voltage that biases a word line coupled to memory cells being sensed. Target data for each memory cell is stored in a data cache associated with that particular memory cell. When it is detected that a memory cell has turned on, the translated count output associated with the count output that is indicative of the voltage level that turned on the memory cell is compared to the target data. The comparison determines the state of the memory cell.

Claims (24)

1. A method for sensing a memory cell in a memory device, the method comprising:

generating a changing count;

biasing a control gate of the memory cell with a voltage generated in response to the changing count;

determining that the memory cell has turned on in response to the voltage; and

comparing a count associated with the voltage to another count to determine a state of the memory cell, wherein the other count value is a target with respect to a verify operation.

2. The method of claim 1 wherein the state of the memory cell is a count value.

3. The method of claim 1 wherein the sensing of the memory cell is a program verify operation.

4. The method of claim 1 wherein the changing count is an increasing count from a counting circuit.

5. The method of claim 1 wherein the voltage generated in response to the changing count is a ramped voltage.

6. The method of claim 1 wherein if the count is greater than or equal to the target count, the memory cell has passed the program verify operation.

7. The method of claim 6 wherein the target count is set using registers.

8. The method of claim 6 wherein the target count is configured to create a margin between a lowest programmed threshold voltage and a read voltage.

9. A method for sensing a memory cell in a memory device, the method comprising:

generating a changing count;

biasing a control gate of the memory cell with a voltage generated in response to the changing count;

determining that the memory cell has turned on in response to the voltage; and

comparing a count associated with the voltage to another count to determine a state of the memory cell, wherein the other count value is a threshold count with respect to a read operation.

10. The method of claim 9 and further including loading the other count into latches associated with the memory cell.

11. The method of claim 9 wherein the voltage is a ramped voltage.

12. The method of claim 11 wherein the changing count is an increasing count and the ramped voltage increases in response to the increasing count.

13. The method of claim 11 wherein the ramped voltage comprises only positive voltages.

14. The method of claim 9 wherein the threshold is a memory cell voltage threshold indicative of a state of the memory cell.

15. The method of claim 9 wherein the sensing of the memory cell is a read operation.

16. The method of claim 9 if the count value is greater than or equal to the threshold count, the memory cell is read as a programmed cell.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2010
From: PABUSTAN, JONATHAN; SARIN, VISHAL; NGUYEN, DZUNG H.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 024052/0034 →
Continuity (1)
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