IP Library Granted Patent US 8,253,452
Granted Patent B2
US 8,253,452 · App. 11/357,081 · Granted Aug 28, 2012

Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same

Assignee: Spansion Israel Ltd
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Quick Facts
Patent No.
US 8,253,452
App. No.
11/357,081
Granted
Aug 28, 2012
Kind
B2
Abstract

The present invention is a circuit and method for providing a reference voltage and/or one or more circuit/circuit-block enabling signals for an IC. As the voltage level on a power supply line ramps upward towards or above a nominal operating voltage, a first threshold voltage detector circuit segment may be activated and may begin to generate a bandgap reset signal once the voltage level of the power supply reaches a first threshold voltage level. The bandgap reset signal may trigger the power-up and operation of a bandgap reference circuit segment, and according to further embodiments of the present invention, a second threshold voltage detector circuit segment, which second threshold voltage detector circuit segment may be matched with the first voltage detector circuit, may generate a voltage reset signal indicating that the bandgap reference source is powering-up. Once the supply voltage reaches a third threshold reference voltage, the first detector may disable the bandgap reset.

Claims (27)

1. A method of providing a reference voltage to an integrated circuit (“IC”) comprising:

i generating a bandgap reset signal and a voltage reset signal once a supply voltage of the IC reaches a first threshold voltage level;

ii disabling the bandgap reset signal once the supply voltage reaches a second threshold voltage level, which second threshold voltage level is sufficient for an associated bandgap reference circuit segment to produce a substantially stable reference voltage; and

iii modulating the voltage-reset signal once the supply voltage reaches a third threshold voltage so as to indicate that the bandgap reference circuit segment is operational.

2. The method according to claim 1 , wherein the third threshold voltage is greater than the second threshold voltage by some voltage margin value.

3. The method according to claim 2 , wherein the voltage margin value is selected such that once the supply voltage reaches the third threshold value the bandgap reference circuit segment has substantially established a steady state output.

4. The method according to claim 1 , wherein the third threshold voltage is substantially equal to the second threshold voltage.

5. The method according to claim 1 , wherein as part of generating a voltage reset signal an input node of a logic device is pulled to down to ground.

6. The method according to claim 5 , wherein as part of modulating the voltage reset signal, the input node of the logic device is pulled up to the supply voltage level.

7. The method according to claim 1 , wherein as part of generating a bandgap reset signal an input node of a logic device is pulled to down to ground.

8. The method according to claim 7 , wherein as part of disabling the bandgap reset signal the input node of the logic device is pulled up to the supply voltage.

9. A circuit for providing a reference voltage to an integrated circuit (“IC”) comprising:

i a first voltage threshold detection circuit segment adapted to generate a bandgap reset signal once a supply voltage of the IC reaches a first threshold voltage level and to disable the bandgap reset signal once the supply voltage reaches a second threshold voltage level, which second threshold voltage level is sufficient for an associated bandgap reference circuit segment to produce a substantially stable reference voltage, and

ii a second voltage threshold detection circuit segment adapted to generate a voltage reset signal once the supply voltage of the IC reaches the first threshold voltage level and to modulate the voltage reset signal once the supply voltage reaches a third threshold voltage level so to indicate that the bandgap reference is operational.

10. The circuit according to claim 9 , wherein said first voltage threshold detection circuit segment comprises two or transistor mirrors and a logic device.

11. The circuit according to claim 9 , wherein said second voltage threshold detection circuit segment comprises two or transistor mirrors and a logic device.

12. The circuit according to claim 9 , further comprising a bangap reference follower circuit segment.

13. The circuit according to claim 12 , wherein said bandgap reference follower includes a voltage offset element adapted to introduce a voltage margin between the first and second threshold voltages.

14. An integrate circuit comprising:

i non-volatile memory circuitry;

ii a first voltage threshold detection circuit segment adapted to generate a bandgap reset signal once a supply voltage of the IC reaches a first threshold voltage level and to disable the bandgap reset signal once the supply voltage reaches a second threshold voltage level, which second threshold voltage level is sufficient for an associated bandgap reference circuit segment to produce a substantially stable reference voltage,

iii a second voltage threshold detection circuit segment adapted to generate a voltage reset signal once the supply voltage of the IC reaches the first threshold voltage level and to modulate the voltage reset signal once the supply voltage reaches a third threshold voltage level so to indicate that the bandgap reference is operational; and

iv wherein said non-volatile memory circuitry utilizes an output signal from the bandgap reference circuit segment.

15. The circuit according to claim 14 , wherein said first voltage threshold detection circuit segment comprises two or transistor mirrors and a logic device.

16. The circuit according to claim 14 , wherein said second voltage threshold detection circuit segment comprises two or transistor mirrors and a logic device.

17. The circuit according to claim 14 , further comprising a bangap reference follower circuit segment.

18. The circuit according to claim 17 , wherein said bandgap reference follower includes a voltage offset element adapted to introduce a voltage margin between the first and second threshold voltages.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FOLLOWING NUMBERS 6272046,7277824,7282374,7286384,7299106,7337032,7460920,7519447 PREVIOUSLY RECORDED ON REEL 039676 FRAME 0237. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 16, 2018
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING
Reel/Frame 047797/0854 →
SECURITY INTEREST Recorded Aug 15, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039676/0237 →
CHANGE OF NAME Recorded Jul 30, 2012
From: SAIFUN SEMICONDUCTORS LTD
To: SPANSION ISRAEL LTD
Reel/Frame 028668/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2006
From: KUSHNARENKO, ALEXANDER
To: SAIFUN SEMICONDUCTORS LTD.
Reel/Frame 017625/0658 →
Continuity (1)
Related Publication 20070194835A1 · Aug 23, 2007