IP Library › Granted Patent US 8,284,083
Granted Patent B2
US 8,284,083 · App. 12/880,802 · Granted Oct 9, 2012

Digital analog converter circuit and method for fault detection

Assignee: Robert Bosch GmbH
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Quick Facts
Patent No.
US 8,284,083
App. No.
12/880,802
Granted
Oct 9, 2012
Kind
B2
Abstract

A digital-analog converter circuit having a first subcircuit for converting a digital signal to an analog voltage, a second subcircuit for determining a first area in which the digital signal lies, a third subcircuit for determining a second area in which the analog voltage lies, and a fourth subcircuit for comparing the first and the second area. Also, a method for fault detection in a digital-analog converter circuit.

Claims (21)

1. A digital-analog converter circuit comprising:

a first subcircuit for converting a digital signal to an analog voltage;

a second subcircuit for determining a first area in which the digital signal lies;

a third subcircuit for determining a second area in which the analog voltage lies;

a fourth subcircuit for comparing the first area and the second area; and

a fifth subcircuit for providing a fault signal with the aid of an output of the fourth subcircuit.

2. The digital-analog converter circuit according to claim 1 , wherein the fourth subcircuit and the fifth subcircuit are implemented in one subcircuit.

3. The digital-analog converter circuit according to claim 1 or 2 , wherein the third subcircuit includes at least one window comparator.

4. The digital-analog converter circuit according to claim 3 , wherein the third subcircuit includes a window comparator for the second area.

5. The digital-analog converter circuit according to claim 3 , wherein the third subcircuit includes a switchable window comparator.

6. The digital-analog converter circuit according to claim 3 , wherein the third subcircuit includes a window comparator for the second area, and wherein the fourth sub circuit includes at least one AND gate or a NAND gate.

7. The digital-analog converter circuit according to claim 3 , wherein the third subcircuit includes a switchable window comparator, and wherein the fourth subcircuit includes at least one AND gate or a NAND gate.

8. The digital-analog converter circuit according to any of claim 1 or 2 , wherein the fourth subcircuit includes at least one AND gate or a NAND gate.

9. The digital-analog converter circuit according to claim 1 , wherein at least one subcircuit includes a number of logic gates.

10. A method for fault detection in a digital-analog converter circuit, comprising:

converting a digital signal to an analog voltage;

determining a first area in which the digital signal lies;

determining a second area in which the analog voltage lies;

determining whether the first area corresponds to the second area; and

detecting a fault if the first area does not correspond to the second area.

11. The method according to claim 10 , wherein the fault detection is carried out at substantially the same time as the signal conversion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2010
From: KEHL, NATALJA
To: ROBERT BOSCH GMBH
Reel/Frame 025472/0317 →
Priority Claims (1)
DE 10 2009 029 519 · Sep 16, 2009 · national
Continuity (1)
Related Publication 20110068963A1 · Mar 24, 2011