IP Library › Granted Patent US 8,294,203
Granted Patent B2
US 8,294,203 · App. 11/574,337 · Granted Oct 23, 2012

Contacting and filling deep-trench-isolation with tungsten

Assignee: NXP B.V.
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Quick Facts
Patent No.
US 8,294,203
App. No.
11/574,337
Granted
Oct 23, 2012
Kind
B2
Abstract

Electrically isolated, deep trench isolation (DTI) structures, are formed in a wafer, and a portion of the DTI structures are converted to electrically connected structures to provide a shielding function, or to provide connection to deep buried layers. In one aspect, DTI structures include a polysilicon filling over a liner layer disposed on the inner surface of a deep trench, the polysilicon is removed by isotropic etching, and the deep trench is re-filled with a conductive material. Alternatively, the polysilicon filling remains and a contact is formed to provide an electrical connection to the polysilicon. In another aspect, a deep trench is disposed in the wafer such that a lower portion thereof is located within a deep buried layer, and after the polysilicon is removed, an anisotropic etch removes a portion of the deep trench liner from the bottom of the deep trench, thereby allowing a tungsten deposition to make electrical contact with the deep buried layer.

Claims (52)

1. A semiconductor structure, comprising:

a substrate,

a first buried layer of a first conductivity type disposed within the substrate;

a second buried layer of a second conductivity type disposed within the substrate and space apart from the first buried layer; and

a first deep trench disposed in the substrate between the first buried layer and the second buried layer;

wherein the first deep trench has dielectric liner layer disposed on an inner surface thereof;

a third buried layer of the first conductivity type disposed in the substrate, the third buried contact spaced apart from the second buried layer;

a second deep trench disposed between the second buried layer and the third buried layer, wherein

the second deep trench has a dielectric layer disposed on an inner surface thereof;

the first deep trench extends into the substrate to a depth that is greater than a depth of the first buried layer, and greater than a depth of the second buried layer; and wherein the first conductivity type and the second conductivity types are opposite conductivity types;

the second deep trench extends into the substrate to a depth that is greater than the depth of the second buried layer, and greater than a depth of the third buried layer;

the first deep trench and the second deep trench are disposed below a shallow trench formed in the substrate; and

wherein the first deep trench extends into a deep buried layer, and a filling of material in the first deep trench extends through the bottom of the first deep trench so as make electrical contact with the deep buried layer.

2. A method of forming a semiconductor structure, comprising:

etching a shallow trench in a semiconductor substrate;

etching a deep trench through the bottom of the shallow trench, the deep trench having an inner surface;

forming a liner layer on the inner surface of the deep trench;

filling the deep trench with polysilicon;

filling the shallow trench with a dielectric material;

forming a first dielectric layer over the filled shallow trench;

etching an opening through the first dielectric layer and through the filled shallow trench so as to expose an upper surface of the polysilicon in the deep trench;

removing the polysilicon from the deep trench; and

filling the deep trench and the opening through the first dielectric layer and through the filled shallow trench with an electrically conductive material.

3. The method of claim 2 , wherein the liner layer comprises an oxide of silicon, the dielectric material filling the shallow trench comprises an oxide of silicon, and the electrically conductive material filling the deep trench comprises tungsten.

4. The method of claim 3 , wherein removing the polysilicon from the deep trench comprises an isotropic polysilicon etch.

5. The method of claim 4 , wherein the isotropic polysilicon etch comprises a wet KOH etch.

6. The method of claim 5 , wherein the isotropic polysilicon etch comprises a dry SF 6 etch.

7. The method of claim 6 , wherein removing the polysilicon from the deep trench comprises a selective etch that removes polysilicon, does not remove the first dielectric material, does not remove the shallow trench dielectric fill material, and does not remove metal silicides.

8. The method of claim 7 , wherein the isotropic polysilicon etch comprises a tetramethylammonium hydroxide etch.

9. A method of forming an electrical contact to a polysilicon filled deep trench isolation structure disposed under a shallow trench structure, comprising:

etching a shallow trench in a semiconductor substrate;

etching a deep trench through the bottom of the shallow trench, the deep trench having an inner surface;

forming a liner layer on the inner surface of the deep trench;

filling the deep trench with polysilicon;

filling the shallow trench with a dielectric material;

forming a first dielectric layer over the filled shallow trench;

etching an opening through the first dielectric layer and through the filled shallow trench so as to expose an upper surface of the polysilicon in the deep trench; and

filling the opening through the first dielectric layer and through the filled shallow trench with an electrically conductive material.

10. The method of claim 9 , wherein the liner layer comprises an oxide of silicon, and the dielectric material filling the shallow trench comprises an oxide of silicon.

11. A method of forming an electrical contact to a deep buried layer through a deep trench disposed under a shallow trench, comprising:

etching a shallow trench in a semiconductor substrate;

etching a deep trench through the bottom of the shallow trench and etching until the bottom of deep trench is disposed within the deep buried layer, the deep trench having an inner surface;

forming a liner layer on the inner surface of the deep trench;

filling the deep trench with polysilicon;

filling the shallow trench with a dielectric material;

forming a first dielectric layer over the filled shallow trench;

patterning a photoresist layer over the first dielectric layer;

etching an opening through the first dielectric layer and through the filled shallow trench so as to expose an upper surface of the polysilicon in the deep trench;

removing the polysilicon from the deep trench;

anisotropically etching the deep trench liner to expose the deep buried layer at the bottom of the deep trench; and

filling the deep trench and the opening through the first dielectric layer and through the filled shallow trench with an electrically conductive material.

12. The method of claim 11 , wherein removing the polysilicon is done prior to removing the patterned photoresist layer, and comprises a dry isotropic etch with SF 6 .

Assignments (11)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2007
From: VAN NOORT, WIBO DANIEL; DEIXLER, PETER
To: NXP B.V.
Reel/Frame 020069/0518 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2007
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 019719/0843 →
Continuity (2)
Provisional Application 60606979 · Sep 2, 2004
Related Publication 20110147884A1 · Jun 23, 2011