Semiconductor chip device with solder diffusion protection

1. A method of manufacturing, comprising:

providing a first semiconductor chip including a substrate with a first principal side and a second and opposite principal side and a first active circuitry portion extending a first distance into the substrate at the second principal side;

forming a barrier in the first semiconductor chip surrounding but laterally separated from the first active circuitry portion and extending into the substrate a second distance greater than the first distance;

coupling a second semiconductor chip to the first semiconductor chip with a plurality of interconnects, the second semiconductor chip having a third principal side facing but separated from the second principal side of the first semiconductor chip by a gap; and

positioning a solder-type thermal interface material on the first principal side of the first semiconductor chip and a portion of the third principle side of the second semiconductor chip laterally separated from the interconnects.

2. The method of claim 1 , comprising positioning a dike between the first and second semiconductor chips and surrounding the plurality of interconnects to prevent material from entering the gap.

3. The method of claim 1 , wherein the forming the barrier comprises forming a trench in the first semiconductor chip and a depositing an insulating material in the trench.

4. The method of claim 1 , wherein the forming the barrier comprises implanting ions into a portion of the substrate that impede metal particle mobility.

5. An apparatus, comprising:

a first semiconductor chip including a substrate with a first principal side and a second and opposite principal side and a first active circuitry portion extending a first distance into the substrate at the second principal side;

a barrier in the first semiconductor chip surrounding but laterally separated from the first active circuitry portion and extending into the substrate a second distance greater than the first distance.

a second semiconductor chip coupled to the first semiconductor chip, the second semiconductor chip having a third principal side facing but separated from the second principal side of the first semiconductor chip by a gap;

a plurality of interconnects coupling the second principal side to the third principal side; and

a solder-type thermal interface material on the first principal side of the first semiconductor chip and a portion of the third principal side of the second semiconductor chip laterally separated from the interconnects.

6. The apparatus of claim 5 , comprising a dike positioned between the first and second semiconductor chips and surrounding the plurality of interconnects to prevent material from entering the gap.

7. The apparatus of claim 5 , wherein the barrier comprises a trench in the first semiconductor chip and an insulating material in the trench.

8. The apparatus of claim 5 , wherein the barrier comprises a portion of the substrate containing implanted ions that impede metal particle mobility.

9. A method of manufacturing, comprising:

providing a semiconductor chip including a first principle side, a peripheral wall and a first active circuitry portion extending a first distance into the semiconductor chip;

forming a barrier in the semiconductor chip surrounding but laterally separated from the first active circuitry portion and extending into the semiconductor chip a second distance greater than the first distance; and

positioning a solder-type thermal interface material on the first principle side of the second semiconductor chip and peripheral wall of the semiconductor chip.