IP Library › Granted Patent US 8,305,060
Granted Patent B2
US 8,305,060 · App. 13/270,329 · Granted Nov 6, 2012

Switching power supply device and a semiconductor integrated circuit

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,305,060
App. No.
13/270,329
Granted
Nov 6, 2012
Kind
B2
Abstract

In a switching power source which controls a current which flows in an inductor through a switching element which performs a switching operation in response to a PWM signal, and forms an output voltage by a capacitor which is provided in series in the inductor, a booster circuit which is constituted of a bootstrap capacity and a MOSFET is provided between an output node of the switching element and a predetermined voltage terminal. The boosted voltage is used as an operational voltage of a driving circuit of the switching element, another source/drain region and a substrate gate are connected with each other such that when the MOSFET is made to assume an OFF state, and a junction diode between one source/drain region and the substrate gate is inversely directed with respect to the boosted voltage which is formed by the bootstrap capacity.

Claims (38)

1. A semiconductor module device packed in one package, the semiconductor module device being for a regulator and for use with a capacitor, the semiconductor module device comprising:

an input voltage terminal;

an output terminal;

a ground potential terminal;

a power terminal;

a first semiconductor chip including a first MOSFET having a source-drain path coupled between the input voltage terminal and the output terminal and a gate;

a second semiconductor chip including a second MOSFET having a source-drain path coupled between the output terminal and the ground potential terminal and a gate; and

a third semiconductor chip coupled to the power terminal, coupled to provide a first control signal to the gate of the first MOSFET and coupled to provide a second control signal to the gate of the second MOSFET, the third semiconductor chip comprising a P-channel switch MOSFET having a source-drain path coupled between the power terminal and the output terminal via the capacitor,

wherein the switch MOSFET is in a conductive state when the second MOSFET is in the conductive state and is in a non-conductive state when the second MOSFET is in a non-conductive state, and

wherein the switch MOSFET has a source region of a P-type and a drain region of the P-type and is formed in an N-type region and includes a parasitic diode between the drain region and the N-type region, the parasitic diode being in a reverse bias state when the second MOSFET is in the non-conductive state.

2. A semiconductor module device according to claim 1 ,

wherein the first MOSFET and the second MOSFET are N-channel MOSFETs,

wherein the source region of the first MOSFET is coupled to the drain region of the second MOSFET.

3. A semiconductor module device according to claim 1 ,

wherein the third semiconductor chip includes a pulse width modulation circuit which provides pulse width modulation signals as the first control signal and the second control signal.

4. A semiconductor module device according to claim 1 ,

wherein an amplitude of the first control signal is larger than a voltage applied to the power terminal.

5. A semiconductor module device according to claim 1 ,

wherein a voltage from the power terminal is lower than a voltage supplied to the input voltage terminal.

6. A semiconductor module device packed in one package, the semiconductor module device being for a regulator and for use with a capacitor, the semiconductor module device comprising:

an input voltage terminal;

an output terminal;

a ground potential terminal;

a power terminal;

a first semiconductor chip including a first MOSFET having a source-drain path coupled between the input voltage terminal and the output terminal, and a gate;

a second semiconductor chip including a second MOSFET having a source-drain path coupled between the output terminal and the ground potential terminal and a gate; and

a third semiconductor chip coupled to the power terminal, coupled to provide a first control signal to the gate of the first MOSFET and coupled to provide a second control signal to the gate of the second MOSFET, the third semiconductor chip comprising an N-channel switch MOSFET with having a source-drain path coupled between the power terminal and the output terminal via the capacitor,

wherein the switch MOSFET is in a conductive state when the second MOSFET is in the conductive state and is in a non-conductive state when the second MOSFET is in a non-conductive state, and

wherein the switch MOSFET has a source region of an N-type and a drain region of the N-type and is formed in a P-type region and includes a parasitic diode between the P-type region and the drain region and, the parasitic diode being in a reverse bias state when the second MOSFET is in the non-conductive state.

7. A semiconductor module device according to claim 6 ,

wherein the first MOSFET and the second MOSFET are N-channel MOSFETs,

wherein the source region of the first MOSFET is coupled to the drain region of the second MOSFET.

8. A semiconductor module device according to claim 6 ,

wherein the third semiconductor chip includes a pulse width modulation circuit which provides pulse width modulation signals as the first control signal and the second control signal.

9. A semiconductor module device according to claim 6 ,

wherein an amplitude of the first control signal is larger than a voltage applied to the power terminal.

10. A semiconductor module device according to claim 6 ,

wherein a voltage from the power terminal is lower than a voltage supplied to the input voltage terminal.

Assignments (1)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
Priority Claims (1)
JP 2004-020517 · Jan 28, 2004 · national
Continuity (4)
Continuation 13023560 · Feb 9, 2011
Continuation 12403966 · Mar 13, 2009
Continuation 10587215
Related Publication 20120086062A1 · Apr 12, 2012