IP Library Granted Patent US 8,306,395
Granted Patent B2
US 8,306,395 · App. 11/936,852 · Granted Nov 6, 2012

Input-output circuit, recording apparatus and reproduction apparatus for digital video signal

Assignee: Hitachi Consumer Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,306,395
App. No.
11/936,852
Granted
Nov 6, 2012
Kind
B2
Abstract

A video signal input-output circuit and a recording-reproduction apparatus in which a digitally compressed video signal input in packet form can be recorded and reproduced efficiently and in stable fashion. In this apparatus, a clock reference is detected from a packet signal containing the clock reference and a digitally compressed video signal, a time stamp for a packet is generated using a clock signal in phase with the clock reference and added to the particular packet, and the packet signals with the time stamp added thereto are recorded closely to each other in a data storage element such as a magnetic recording medium. At playback, the packet interval is output by being restored to the original length on the basis of the time stamp added to the packet in store.

Claims (13)

1. An apparatus for reproducing a digitally compressed video signal in the form of fixed length packets from a recording medium, each of the fixed length packets including a fixed length time stamp and a fixed length control information, the time stamp indicating an output timing of the fixed length packet, the apparatus comprising:

a reproduction circuit which reproduces the fixed length packets from the recording medium; a memory for storing the reproduced fixed length packet

a local oscillator which generates a clock signal;

a counter which counts the clock signal generated by the local oscillator; and

an output circuit which generates an output packet signal by deleting the fixed length time stamp and the fixed length control information from the each fixed length packet read from the memory, and outputs the output packet signal so that the output packet signal is outputted when a value of the time stamp of the fixed length packet is matched with a count value counted by the counter.

2. A method of reproducing a digitally compressed video signal in the form of fixed length packets from a recording medium, each of the fixed length packets including a fixed length time stamp and a fixed length control information, and the time stamp indicating an output timing of the fixed length packet, the method comprising the steps of:

reproducing the fixed length packet from the recording medium;

storing the reproduced fixed length packets in a memory;

reading the fixed length time stamp of the each reproduced fixed length packet;

generating a clock signal;

counting the clock signal;

generating an output packet signal by deleting the fixed length time stamp and the fixed length control information from the each fixed length packet read from the memory; and

outputting the output packet signal so that the each output packet signal is outputted when a value of the time stamp of the fixed length packet is matched with a count value of the clock signal.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2018
From: HITACHI MAXELL, LTD.
To: MAXELL, LTD.
Reel/Frame 045142/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2014
From: HITACHI CONSUMER ELECTRONICS CO., LTD.; HITACHI CONSUMER ELECTRONICS CO, LTD.
To: HITACHI MAXELL, LTD.
Reel/Frame 033694/0745 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2010
From: HITACHI, LTD.
To: HITACHI CONSUMER ELECTRONICS CO., LTD.
Reel/Frame 024445/0332 →
Priority Claims (2)
JP 06-264874 · Oct 28, 1994 · national
JP 07-140294 · Jun 7, 1995 · national
Continuity (5)
Continuation 10367730 · Feb 19, 2003
Continuation 09455413 · Dec 6, 1999
Division 08972457 · Nov 18, 1997
Division 08547662 · Oct 24, 1995
Related Publication 20100027962A1 · Feb 4, 2010