IP Library Granted Patent US 8,316,249
Granted Patent B2
US 8,316,249 · App. 12/527,211 · Granted Nov 20, 2012

Variable scaling for computing elements

Assignee: Georgia Tech Research Corporation
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Quick Facts
Patent No.
US 8,316,249
App. No.
12/527,211
Granted
Nov 20, 2012
Kind
B2
Abstract

Various systems, methods, and computing units are provided for variable scaling of computing elements. In one representative embodiment, a method comprises: receiving a plurality of computing resource levels; and providing one of the plurality of computing resource levels to each of a plurality of computing elements, each computing element having an associated output, the provided voltage level based upon associated output significance.

Claims (30)

1. A method, comprising:

receiving a plurality of computing resource levels, each computing resource level sufficient to enable operation of a computing element;

providing one of the plurality of computing resource levels to each of a plurality of computing elements, each computing element having an associated output, the provided computing resource level based upon associated output significance; and

outputting the output by each of the computing elements with a probability of correctness based upon the provided computing resource levels.

2. The method of claim 1 , wherein the computing resource levels are clock rates.

3. The method of claim 1 , wherein the associated outputs are ordered from least significant (LS) to most significant (MS).

4. The method of claim 3 , wherein the provided computing resource level is based upon a function of associated output significance.

5. The method of claim 4 , wherein the provided computing resource level is based upon a geometric scaling function of associated output significance.

6. The method of claim 1 , wherein the same computing resource level is provided to each computing element associated with a group of outputs.

7. The method of claim 1 , wherein each computing resource level is received from a separate source.

8. The method of claim 7 , wherein the computing resource level of at least one separate source is adjustable.

9. The method of claim 1 , wherein receiving a plurality of computing resource levels comprises:

receiving a computing resource from a source; and

dividing the received computing resource into the plurality of computing resource levels.

10. A computational system, comprising a computing unit configured to:

receive a plurality of computing resource levels, each computing resource level sufficient to enable operation of a computing element;

provide one of the plurality of computing resource levels to each of a plurality of computing elements, each computing element having an associated output bit, the provided computing resource level based upon associated output bit significance; and

outputting the output bit by each of the computing elements with a probability of correctness based upon the provided computing resource levels.

11. The computing unit of claim 10 , wherein the computing resource levels are clock rates.

12. The computational system of claim 10 , wherein the associated output bits are ordered from least significant (LS) to most significant (MS).

13. The computational system of claim 10 , wherein the provided computing resource level is based upon a function of associated output bit significance.

14. The computational system of claim 10 , wherein the same computing resource level is provided to each computing element associated with a group of output bits.

15. The computational system of claim 10 , further comprising a supply configured to provide at least one of the plurality of computing resource levels.

16. A computing unit, comprising:

a plurality of unit outputs, each unit output having a corresponding significance; and

a plurality of computing elements, each computing element associated with one of the plurality of unit outputs, each computing element configured to receive a computing resource level based upon the significance of the associated unit output and to provide an element output with a probability of correctness based upon the received computing resource level.

17. The computing unit of claim 16 , wherein the unit outputs are ordered from least significant (LS) to most significant (MS).

18. The computing unit of claim 16 , wherein the probability of correctness is based upon a function of associated output significance.

19. The computing unit of claim 16 , wherein at least one of the computing elements is configured with a threshold voltage such that the element output is provided with a probability of correctness based upon the significance of the associated unit output.

20. The computing unit of claim 19 , wherein each computing element associated with the unit output is configured with the threshold voltage.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2011
From: PALEM, KRISHNA V.
To: GEORGIA TECH RESEACH CORPORATION
Reel/Frame 025809/0727 →
CONFIRMATORY LICENSE Recorded Jan 20, 2010
From: GEORGIA TECH RESEARCH CORPORATION
To: AFRL/RIJ
Reel/Frame 023813/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2009
From: AKGUL, BILGE E; GEORGE, JASON M; MARR, HARRY BOURNE
To: GEORGIA TECH RESEARCH CORPORATION
Reel/Frame 023100/0198 →
Continuity (2)
Provisional Application 60890376 · Feb 16, 2007
Related Publication 20100077402A1 · Mar 25, 2010