Solid-state imaging device

1. A solid-state imaging device comprising:

a photodiode array having a plurality of photodiodes each making photoelectric conversion, which are arrayed in rows and columns;

a plurality of read transistors provided in one-to-one correspondence with the plurality of photodiodes, making a plurality of sets each comprised of four photodiodes of the plurality of photodiodes and four read transistors of the plurality of the read transistors coupled to the four photodiodes, respectively, and placed adjacent to each other in a direction of the rows and in a direction of the columns, and each of plurality of read transistors having one terminal and the other terminal of a current path, and a gate, and the one terminal of the current path being connected to a corresponding one of the photodiodes, the other terminal of the current path of any one of the four read transistors being connected in common to a first node, the first node being in a floating-state;

a plurality of read control lines extended in the direction of the rows to which the four read transistors are respectively and correspondingly connected through the gate of each of the four read transistors, and independently supplied with a read signal;

a plurality of vertical signal lines configured to output signals photoelectrically converted by two photodiodes of the plurality of photodiodes included in one of the sets and adjacent in the direction of the rows for an independent period within one horizontal blanking period of image scanning;

a plurality of column select circuits connected to the vertical signal lines, respectively, and each selecting signals of a corresponding one of the vertical signal lines to output two signals, each of the column select circuits selecting signals of the corresponding one of the vertical signal lines to output the two signals within the one horizontal blanking period of the image scanning; and

a plurality of pairs of correlated double sampling circuits respectively provided for each of the vertical signal lines, the pair of correlated double sampling circuits receiving the two signals from a corresponding one of the column select circuits, each of the correlated double sampling circuits obtaining a difference between a reference signal level which is held first and a read signal level captured later, and holding the obtained difference.

2. The device according to claim 1 , further comprising:

a plurality of reset transistors each having one terminal and the other terminal of a current path, and a gate, the one terminal of the current path being connected to the first node, the other terminal of the current path being connected to a power supply node; and

a plurality of reset control lines extending in the direction of the rows, each connected to the gate of each of the reset transistors at a unit of in a row, and each supplied with a reset signal.

3. The device according to claim 2 , wherein each of the reset control lines is supplied with the reset signal before reading the photoelectrically converted signals from the four photodiodes included in one of the sets.

4. The device according to claim 2 , wherein the power supply node is supplied with a reference potential in synchronism with the reset signal before reading the photoelectrically converted signals from the four photodiodes included in one of the sets.

5. The device according to claim 1 , further comprising:

a plurality of amplification transistors provided in one-to-one correspondence with each of the sets, each of the amplification transistors having one terminal and the other terminal of a current path, and a gate, the gate being connected to the first node, the one terminal of the current path being connected to a power supply node, the other terminal of the current path being connected to a corresponding one of the vertical signal lines.

6. The device according to claim 1 , further comprising:

a plurality of amplification transistors provided in one-to-one correspondence with each of the sets, each of the amplification transistors having one terminal and the other terminal of a current path, and a gate, the gate being connected to the first node, and the one terminal of the current path being connected to a power supply node;

a plurality of row select transistors each having one terminal and the other terminal of a current path, and a gate, the one terminal of the current path being connected to the other terminal of a current path of a corresponding one of the amplification transistors, the other terminal of the current path being connected to a corresponding one of the vertical signal lines; and

a plurality of row select lines extending in the direction of the rows, each being connected to the gate of a corresponding one of the row select transistors, and each being supplied with a row select signal.

7. The device according to claim 6 , wherein the power supply node is supplied with a fixed power supply potential.

8. A solid-state imaging device comprising:

a photodiode array having a plurality of photodiodes each making photoelectric conversion, which are arrayed in rows and columns;

a plurality of read transistors provided in one-to-one correspondence with the plurality of photodiodes, making a plurality of sets each comprised of four photodiodes of the plurality of photodiodes and four read transistors of the plurality of the read transistors coupled to the four photodiodes, respectively, and placed adjacent to each other in a direction of the rows and in a direction of the columns, and each of plurality of read transistors having one terminal and the other terminal of a current path, and a gate, the one terminal of the current path being connected to a corresponding one of the photodiodes coupled to the four read transistor, respectively, the other terminal of the current path being connected to a first node, the first node being in a floating-state;

a plurality of read control lines extended in the direction of the rows to which the gate of a corresponding one of the four read transistors is connected, and independently supplied with a read signal;

a plurality of vertical signal lines configured to output signals photoelectrically converted by two photodiodes of the plurality of photodiodes included in one of the sets and adjacent in the direction of the rows for an independent period within one horizontal blanking period of image scanning;

a plurality of column select circuits connected to the vertical signal lines, respectively, and each selecting signals of a corresponding one of the vertical signal lines to output two signals, each of the column select circuits selecting signals of the corresponding one of the vertical signal lines to output the two signals within the one horizontal blanking period of the image scanning; and

a plurality of pairs of correlated double sampling circuits respectively provided for each of the vertical signal lines, the pair of correlated double sampling circuits receiving the two signals from a corresponding one of the column select circuits, each of the correlated double sampling circuits obtaining a difference between a reference signal level which is held first and a read signal level captured later, and holding the obtained difference; and

a row select circuit independently supplying a read signal to the read control lines.

9. The device according to claim 8 , further comprising:

a plurality of reset transistors each having one terminal and the other terminal of a current path, and a gate, the one terminal of the current path being connected to the first node, the other terminal of the current path being connected to a power supply node; and

a plurality of reset control lines each connected to the gate of each of the reset transistors in a row, and each supplied with a reset signal.

10. The device according to claim 9 , wherein each of the reset control lines is supplied with the reset signal before reading the photoelectrically converted signals from the four photodiodes included in the sets.

11. The device according to claim 9 , wherein the power supply node is supplied with a reference potential in synchronism with the reset signal before reading the photoelectrically converted signals from the four photodiodes included in the sets.

12. The device according to claim 8 , further comprising:

a plurality of amplification transistors provided in one-to-one correspondence with each of the sets, each of the amplification transistors having one terminal and the other terminal of a current path and, and a gate, the gate being connected to the first node, the one terminal of the current path being connected to a power supply node, and the other terminal of the current path being connected to a corresponding one of the vertical signal lines.

13. The device according to claim 8 , further comprising:

a plurality of amplification transistors provided in one-to-one correspondence with each of the sets, each of the amplification transistors having one terminal and the other terminal of a current path, and a gate, the gate being connected to the first node, and the one terminal of the current path being connected to a power supply node;

a plurality of row select transistors each having one terminal and the other terminal of a current path, and a gate, the one terminal of the current path being connected to the other terminal of a current path of a corresponding one of the amplification transistors, and the other terminal of the current path being connected to a corresponding one of the vertical signal lines; and

a plurality of row select lines extending in the direction of the rows, each being connected to the gate of a corresponding one of the row select transistors, and each being supplied with a row select signal.

14. The device according to claim 13 , wherein the power supply node is supplied with a fixed power supply potential.

15. The device according to claim 13 , wherein the row select signal is output from a corresponding one of the row select transistors.