IP Library › Granted Patent US 8,320,101
Granted Patent B2
US 8,320,101 · App. 12/817,352 · Granted Nov 27, 2012

Multilayer electronic component and method for manufacturing the same

Assignee: Murata Manufacturing Co., Ltd.
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Quick Facts
Patent No.
US 8,320,101
App. No.
12/817,352
Granted
Nov 27, 2012
Kind
B2
Abstract

In a method for manufacturing a multilayer electronic component, after a plating layer for forming an external electrode is formed on an end surface of a laminate, conditions for heat-treating the laminate are set such that interdiffusion layers have ends which face internal electrodes and which are spaced from the end surface of the laminate at a distance of about 0.5 μm to about 1.9 μm.

Claims (8)

1. A method for manufacturing a multilayer electronic component, comprising:

a step of preparing a laminate including a plurality of stacked insulating layers and a plurality of internal electrodes which are each disposed between the insulating layers and which include end portions exposed at predetermined surfaces of the laminate; and

a step of forming external electrodes on the predetermined surfaces of the laminate such that the exposed end portions of the internal electrodes are electrically connected to each other; wherein

the external electrode-forming step includes a plating sub-step of forming continuous plating layers on the predetermined surfaces of the laminate such that metal deposits are deposited on the exposed end portions of the internal electrodes and are then grown so as to be in contact with each other and a heat-treating sub-step of heat-treating the laminate having the plating layers, conditions of the heat-treating sub-step are selected such that interdiffusion layers in which a metal component included in the plating layers and a metal component included in the internal electrodes are both included are formed between the internal electrodes and the plating layers, and the interdiffusion layers extend between the internal electrode and the plating layers and have ends which face the internal electrodes and which are each located at a position about 0.5 μm to about 1.9 μm spaced apart from a corresponding one of the predetermined surfaces of the laminate.

2. A multilayer electronic component comprising:

a laminate including a plurality of stacked insulating layers and a plurality of internal electrodes which are each disposed between the insulating layers and which include end portions exposed at predetermined surfaces of the laminate; and

external electrodes disposed on the predetermined surfaces of the laminate; wherein

the external electrodes include plating layers which are disposed on the predetermined surfaces of the laminate so as to electrically connect the exposed end portions of the internal electrodes, the internal electrodes and the plating layers sandwich interdiffusion layers in which a metal component included in the plating layers and a metal component included in the internal electrodes are both included, and the interdiffusion layers extend between the internal electrode and the plating layers and have ends which face the internal electrodes and which are each located at a position about 0.5 μm to about 1.9 μm spaced apart from a corresponding one of the predetermined surfaces of the laminate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2010
From: TAKEUCHI, SHUNSUKE; KAWASAKI, KENICHI; MOTOKI, AKIHIRO; OGAWA, MAKOTO
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 024551/0602 →
Priority Claims (1)
JP 2009-151730 · Jun 26, 2009 · national
Continuity (1)
Related Publication 20100328842A1 · Dec 30, 2010