IP Library › Granted Patent US 8,324,928
Granted Patent B2
US 8,324,928 · App. 13/026,734 · Granted Dec 4, 2012

Calibration circuit

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,324,928
App. No.
13/026,734
Granted
Dec 4, 2012
Kind
B2
Abstract

A calibration circuit includes a pad connected between an external resistor connected to a first voltage source and a first node, a first resistor unit connected between the first node and a second voltage source, a second resistor unit connected between a second node and the second voltage source, a first control unit for generating and outputting a first output signal, a first pull-down circuit connected between the second node and the first voltage source, a second pull-down circuit connected between a third node and the first voltage source, a second control unit for generating and outputting a second output signal, and a pull-up circuit connected between the third node and the second voltage source.

Claims (43)

1. A calibration circuit comprising:

a pad connected between an external resistor connected to a first voltage source and a first node;

a first resistor unit connected between the first node and a second voltage source and having an impedance that is determined in response to a first control signal;

a second resistor unit connected between a second node and the second voltage source and having an impedance that is determined in response to a second control signal;

a first control unit for generating and outputting a first output signal by using a voltage level of the first node and a voltage level of the second node;

a first pull-down circuit connected between the second node and the first voltage source and having an impedance that is determined in response to the first output signal;

a second pull-down circuit connected between a third node and the first voltage source and having an impedance that is determined in response to the first output signal;

a second control unit for generating and outputting a second output signal by using a voltage level of the third node and a voltage level of a reference voltage; and

a pull-up circuit connected between the third node and the second voltage source and having an impedance that is determined in response to the second output signal.

2. The calibration circuit of claim 1 , wherein the first control unit generates and outputs the first output signal that determines the impedance of the first pull-down circuit so that the voltage level of the first node is the same as the voltage level of the second node, and

the second control unit generates and outputs the second output signal that determines the impedance of the pull-up circuit so that the voltage level of the third node is the same as the voltage level of the reference voltage.

3. The calibration circuit of claim 1 , wherein the first resistor unit comprises:

a plurality of first resistors connected between the first node and the second voltage source; and

a plurality of first switches that are each for connecting a corresponding first resistor of the plurality of first resistors to the first node or the second voltage source, or that are each connected between both terminals of the corresponding first resistor and are each for being closed to create a short-circuit or being opened in response to a corresponding bit of a plurality of bits of the first control signal.

4. The calibration circuit of claim 1 , wherein the second resistor unit comprises:

a plurality of second resistors connected between the second node and the second voltage source; and

a plurality of second switches that are each for connecting a corresponding second resistor of the plurality of second resistors to the second node or the second voltage source, or that are each connected between both terminals of the corresponding first resistor and are each for being closed to create a short-circuit or being opened in response to a corresponding bit of a plurality of bits of the first control signal.

5. The calibration circuit of claim 1 , wherein the first control unit comprises:

a first comparator having a first input terminal connected to the first node and a second input terminal connected to the second node; and

a first counter for generating the first output signal in response to an output signal of the first comparator, and

the second control unit comprises:

a second comparator having a first input terminal connected to the third node and a second input terminal to which the reference voltage is applied; and

a second counter for generating the second output signal in response to an output signal of the second comparator.

6. The calibration circuit of claim 1 , wherein the reference voltage has the voltage level that is in the middle between a voltage level of the first voltage source and a voltage level of the second voltage source.

7. A calibration circuit comprising:

a pad connected between an external resistor connected to a first voltage source and a first node connected to a second voltage source;

a first control unit for generating and outputting a first output signal by using a voltage level of the first node and a voltage level of a second node connected to the second voltage source;

a first pull-down circuit connected between the second node and the first voltage source and having an impedance that is determined in response to the first output signal;

a second pull-down circuit connected between a third node and the first voltage source and having an impedance that is determined in response to the first output signal;

a second control unit for generating and outputting a second output signal by using a voltage level of the third node and a voltage level of a reference voltage; and

a pull-up circuit connected between the third node and the second voltage source and having an impedance that is determined in response to the second output signal.

8. The calibration circuit of claim 7 , wherein the first control unit generates and outputs the first output signal that determines the impedance of the first pull-down circuit so that the voltage level of the first node is the same as the voltage level of the second node, and

the second control unit generates and outputs the second output signal that determines the impedance value of the pull-up circuit so that the voltage level of the third node is the same as the voltage level of the reference voltage.

9. The calibration circuit of claim 7 , further comprising:

a first switching unit for controlling whether to connect the second voltage source to the first node in response to an enable signal; and

a second switching unit for controlling whether to connect the second voltage source to the second node in response to the enable signal.

10. The calibration circuit of claim 7 , wherein the first control unit comprises:

a first comparator having a first input terminal connected to the first node and a second input terminal connected to the second node; and

a first counter for generating the first output signal in response to an output signal of the first comparator, and

the second control unit comprises:

a second comparator having a first input terminal connected to the third node and a second input terminal to which the reference voltage is applied; and

a second counter for generating the second output signal in response to an output signal of the second comparator.

11. The calibration circuit of claim 7 , wherein the voltage level of the reference voltage is in the middle between a voltage level of the first voltage source and a voltage level of the second voltage source.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2011
From: KIM, JUN-BAE
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 025804/0593 →
Priority Claims (1)
KR 10-2010-0016341 · Feb 23, 2010 · national
Continuity (1)
Related Publication 20110204869A1 · Aug 25, 2011