IP Library Granted Patent US 8,329,506
Granted Patent B2
US 8,329,506 · App. 12/618,944 · Granted Dec 11, 2012

Semiconductor device and method for manufacturing the same

Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,329,506
App. No.
12/618,944
Granted
Dec 11, 2012
Kind
B2
Abstract

It is an object to provide an oxide semiconductor which is suitable for use in a semiconductor device. Alternatively, it is another object to provide a semiconductor device using the oxide semiconductor. Provided is a semiconductor device including an In—Ga—Zn—O based oxide semiconductor layer in a channel formation region of a transistor. In the semiconductor device, the In—Ga—Zn—O based oxide semiconductor layer has a structure in which crystal grains represented by InGaO 3 (ZnO) m (m=1) are included in an amorphous structure represented by InGaO 3 (ZnO) m (m>0).

Claims (24)

1. A method for manufacturing a semiconductor device comprising the steps of:

forming an In—Ga—Zn—O based oxide semiconductor layer having an amorphous structure over a substrate by a sputtering method;

heating the In—Ga—Zn—O based oxide semiconductor layer to form an oxide semiconductor layer including crystal grains represented by InGaZnO 4 in the amorphous structure; and

forming a channel formation region of a transistor using the oxide semiconductor layer including the crystal grains represented by InGaZnO 4 ,

wherein a proportion of the amorphous structure in the In—Ga—Zn—O based oxide semiconductor layer is 90 volume % or less after the heating,

wherein a proportion of the crystal grains represented by InGaZnO 4 to a whole of crystal grains is 80 volume % or more.

2. The method for manufacturing the semiconductor device according to claim 1 , wherein the In—Ga—Zn—O based oxide semiconductor layer having the amorphous structure is formed using a target in which a Zn content by atomic percent is less than or equal to an In content by atomic percent and the Zn content by atomic percent is less than or equal to a Ga content by atomic percent.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein the heating is performed at 350 degrees centigrade or more.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein the heating is performed within a temperature from 350 to 800 degrees centigrade.

5. A method for manufacturing a semiconductor device comprising the steps of:

forming an In—Ga—Zn—O based oxide semiconductor layer having an amorphous structure over a substrate by a sputtering method;

heating the oxide semiconductor layer to form an oxide semiconductor layer including crystal grains represented by InGaZnO 4 in the amorphous structure; and

forming a channel formation region of a transistor using the oxide semiconductor layer including the crystal grains represented by InGaZnO 4 ,

wherein a proportion of the amorphous structure in the In—Ga—Zn—O based oxide semiconductor layer is 90 volume % or less after the heating,

wherein a proportion of the crystal grains represented by InGaZnO 4 to a whole of crystal grains is 80 volume % or more,

wherein a Zn content by atomic percent is less than an In content by atomic percent in the In—Ga—Zn—O based oxide semiconductor layer, and

wherein the Zn content by atomic percent is less than a Ga content by atomic percent in the In—Ga—Zn—O based oxide semiconductor layer.

6. The method for manufacturing the semiconductor device according to claim 5 , wherein the In—Ga—Zn—O based oxide semiconductor layer having the amorphous structure is formed using a target in which a Zn content by atomic percent is less than or equal to an In content by atomic percent and the Zn content by atomic percent is less than or equal to a Ga content by atomic percent.

7. The method for manufacturing a semiconductor device according to claim 5 , wherein the heating is performed at 350 degrees centigrade or more.

8. The method for manufacturing a semiconductor device according to claim 5 , wherein the heating is performed within a temperature from 350 to 800 degrees centigrade.

9. The method for manufacturing a semiconductor device according to claim 1 further comprising performing an oxygen radical treatment to the channel formation region of the transistor.

10. The method for manufacturing a semiconductor device according to claim 9 , wherein the oxygen radical treatment is performed under an N 2 O atmosphere.

11. The method for manufacturing a semiconductor device according to claim 5 further comprising performing an oxygen radical treatment to the channel formation region of the transistor.

12. The method for manufacturing a semiconductor device according to claim 11 , wherein the oxygen radical treatment is performed under an N 2 O atmosphere.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2009
From: AKIMOTO, KENGO; SAKATA, JUNICHIRO; HIROHASHI, TAKUYA; TAKAHASHI, MASAHIRO; KISHIDA, HIDEYUKI; MIYANAGA, AKIHARU
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 023521/0429 →
Priority Claims (1)
JP 2008-296901 · Nov 20, 2008 · national
Continuity (1)
Related Publication 20100123130A1 · May 20, 2010