IP Library Granted Patent US 8,339,840
Granted Patent B2
US 8,339,840 · App. 12/668,925 · Granted Dec 25, 2012

Storage element and memory

Assignee: Sony Corporation
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Quick Facts
Patent No.
US 8,339,840
App. No.
12/668,925
Granted
Dec 25, 2012
Kind
B2
Abstract

A memory is provided that is capable of improving the thermal stability without increasing the write current. The memory is configured to include: a storage element which has a storage layer that holds information according to a magnetization state of a magnetic substance and in which a magnetization fixed layer is provided on the storage layer with an intermediate layer 16 interposed therebetween, the intermediate layer is formed of an insulator, the direction of magnetization of the storage layer is changed by injecting electrons spin-polarized in a lamination direction such that the information is recorded in the storage layer, and distortion is applied to the storage layer from an insulating layer which exists around the storage layer and has a smaller coefficient of thermal expansion than the storage layer. A wiring line for supplying a current flowing in the lamination direction of the storage element.

Claims (9)

1. A memory comprising:

memory cells each being formed by a storage element which has a storage layer having shape anisotropy and that holds information according to a magnetization state of a magnetic substance and in which a magnetization fixed layer is provided on the storage layer with an intermediate layer interposed therebetween, the intermediate layer is formed of an insulator, and the direction of magnetization of the storage layer is changed by injecting electrons spin-polarized in a lamination direction such that the information is recorded in the storage layer; and

a wiring line for supplying a current flowing in the lamination direction of the storage element,

wherein the memory cells are disposed in a matrix,

wherein a first material is applied around perimeters of the storage elements of the memory cell as viewed from a top view of the storage element,

wherein distortion is applied to the storage layer by embedding a second material with a coefficient of thermal expansion which is different from that of the first material between memory cell rows, the second material not being in direct contact with the memory cells,

wherein the storage element of the memory cell has a planar shape in which a row direction of the memory cell is a longitudinal direction, and

wherein the second material is formed in a strip-shape between rows in a direction parallel to the row direction of the memory cells.

2. The memory according to claim 1 , wherein the strip-shaped second material is configured to apply distortion primarily in one direction to the storage layers.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2010
From: YAMANE, KAZUTAKA; OISHI, YUKI; KANO, HIROSHI
To: SONY CORPORATION
Reel/Frame 023907/0066 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2010
From: HOSOMI, MASANORI; OHMORI, HIROYUKI; IKARASHI, MINORU; YAMAMOTO, TETSUYA; HIGO, YUTAKA
To: SONY CORPORATION
Reel/Frame 023893/0710 →
Priority Claims (1)
JP 2007-188371 · Jul 19, 2007 · national
Continuity (1)
Related Publication 20100200939A1 · Aug 12, 2010