IP Library › Granted Patent US 8,341,303
Granted Patent B2
US 8,341,303 · App. 12/215,988 · Granted Dec 25, 2012

Asymmetrical universal serial bus communications

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 8,341,303
App. No.
12/215,988
Granted
Dec 25, 2012
Kind
B2
Abstract

In some embodiments a Universal Serial Bus cable includes a first differential pair to transmit bus signals, and a second differential pair to transmit bus signals in a same direction as the bus signals transmitted by the first differential pair. In this manner, a bandwidth of the Universal Serial Bus cable is doubled in that same direction. Other embodiments are described and claimed.

Claims (52)

1. A Universal Serial Bus cable comprising:

a first differential pair to transmit bus signals; and

a second differential pair to transmit bus signals in a same direction as the bus signals transmitted by the first differential pair, wherein a bandwidth of the Universal Serial Bus cable is asymmetric and is doubled in the same direction.

2. The Universal Serial Bus cable of claim 1 , wherein the Universal Serial Bus Cable is a USB 3.0 cable.

3. The Universal Serial Bus cable of claim 2 , wherein the bandwidth of the USB 3.0 cable in the same direction is provided by two channels.

4. The Universal Serial Bus cable of claim 2 , wherein the bandwidth of the USB 3.0 cable in the same direction is at least 10 Gbps.

5. The Universal Serial Bus cable of claim 1 , wherein the first differential pair couples a first transmit block with a first receive block and wherein the second differential pair couples a second transmit block with a second receive block.

6. The Universal Serial Bus cable of claim 1 , further comprising a lesser bandwidth communication path available in a direction opposite the same direction.

7. The Universal Serial Bus cable of claim 6 , wherein the lesser bandwidth communication path is bi-directional.

8. The Universal Serial Bus cable of claim 6 , wherein the lesser bandwidth communication path is selectively bi-directional.

9. The Universal Serial Bus cable of claim 6 , wherein the lesser bandwidth communication path is to execute link management functions while also providing a data path in a direction opposite to the same direction of the double bandwidth path.

10. The Universal Serial Bus cable of claim 9 , wherein the link management functions include one or more of flow control protocol, power management protocol, runtime reversal of the double bandwidth direction, and/or protocol handshake.

11. The Universal Serial Bus cable of claim 6 , wherein the lesser bandwidth communication path is a USB 2.0 communication path.

12. A system comprising:

a first Universal Serial Bus device;

a second Universal Serial Bus device; and

a Universal Serial Bus cable to couple the first Universal Serial Bus device and the second Universal Serial Bus device, the Universal Serial Bus cable including:

a first differential pair to transmit bus signals; and

a second differential pair to transmit bus signals in a same direction as the bus signals transmitted by the first differential pair, wherein a bandwidth of the Universal Serial Bus cable is asymmetric and is doubled in the same direction.

13. The system of claim 12 , wherein the first Universal Serial Bus is a USB 3.0 device, the second Universal Serial Bus device is a USB 3.0 device, and the Universal Serial Bus Cable is a USB 3.0 cable.

14. The system of claim 13 , wherein the bandwidth of the USB 3.0 cable in the same direction is provided by two channels.

15. The system of claim 12 , wherein the Universal Serial Bus Cable is a USB 3.0 cable, and the bandwidth of the USB 3.0 cable in the same direction is at least 10 gigabits per second.

16. The system of claim 12 , wherein the first differential pair couples a first transmit block with a first receive block and wherein the second differential pair couples a second transmit block with a second receive block.

17. The system of claim 12 , wherein the first Universal Serial Bus device is one or more of a Universal Serial Bus host device, a Universal Serial Bus hub device, and/or a Universal Serial Bus client device.

18. The system of claim 17 , wherein the second Universal Serial Bus device is one or more of a Universal Serial Bus host device, a Universal Serial Bus hub device, and/or a Universal Serial Bus client device.

19. The system of claim 12 , the Universal Serial Bus cable further comprising a lesser bandwidth communication path in a direction opposite the same direction.

20. The system of claim 19 , wherein the lesser bandwidth communication path is bi-directional.

21. The system of claim 19 , wherein the lesser bandwidth communication path is selectively bi-directional.

22. The system of claim 19 , wherein the lesser bandwidth communication path is to execute link management functions while also providing a data path in a direction opposite to the same direction of the double bandwidth path.

23. The system of claim 22 , wherein the link management functions include one or more of flow control protocol, power management protocol, runtime reversal of the double bandwidth direction, and/or protocol handshake.

24. The system of claim 19 , wherein the lesser bandwidth communication path is a USB 2.0 communication path.

25. A method comprising:

enabling a first differential pair of a Universal Serial Bus cable to point in a same direction as a second differential pair of a Universal Serial Bus cable in order to transmit bus signals on the first differential pair and the second differential pair in the same direction, wherein a bandwidth of the Universal Serial Bus cable is asymmetric and is doubled in the same direction.

26. The method of claim 25 , wherein the Universal Serial Bus Cable is a USB 3.0 cable.

27. The method of claim 26 , wherein the bandwidth of the USB 3.0 cable in the same direction is provided by two channels of at least 5 Gigabits per second.

28. The method of claim 25 , wherein the bandwidth of the Universal Serial Bus Cable in the same direction is at least 10 Gigabits per second.

29. The method of claim 25 , further comprising determining whether an asymmetrical capability is supported at both ends of the Universal Serial Bus cable.

30. The method of claim 29 , further comprising enabling a Universal Serial Bus link training if the asymmetrical capability is not supported at both ends of the Universal Serial Bus cable.

31. The method of claim 25 , further comprising determining whether a direction of asymmetrical capability of the Universal Serial Bus cable is configurable.

32. The method of claim 25 , further comprising enabling an asymmetrical capability in a designed direction if the direction of asymmetrical capability is not configurable.

33. The method of claim 25 , further comprising querying a user for a desired double speed direction.

34. The method of claim 31 , further comprising enabling an asymmetrical capability in the desired double speed direction.

35. The method of claim 25 , further comprising configuring the desired double speed direction in response to an input from a user.

36. The method of claim 25 , further comprising communicating on a lesser bandwidth communication path of the Universal Serial Bus cable in a direction opposite the same direction.

37. The method of claim 36 , wherein the lesser bandwidth communication path is bi-directional.

38. The method of claim 36 , wherein the lesser bandwidth communication path is selectively bi-directional.

39. The method of claim 36 , wherein the lesser bandwidth communication path is to execute link management functions while also providing a data path in a direction opposite to the same direction of the double bandwidth path.

40. The method of claim 39 , wherein the link management functions include one or more of flow control protocol, power management protocol, runtime reversal of the double bandwidth direction, and/or protocol handshake.

41. The method of claim 36 , wherein the lesser bandwidth communication path is a USB 2.0 communication path.

42. The Universal Serial Bus cable of claim 1 , wherein the Universal Serial Bus cable is configured for asymmetrical fat pipe operation.

43. The system of claim 12 , wherein the Universal Serial Bus cable is configured for asymmetrical fat pipe operation.

44. The method of claim 25 , wherein the Universal Serial Bus cable is configured for asymmetrical fat pipe operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2009
From: SOLOMON, GARY; SCHAEFER, JOE; DUNSTAN, ROBERT A.; SAUNDERS, BRAD
To: INTEL CORPORATION
Reel/Frame 022779/0577 →
Continuity (1)
Related Publication 20090327536A1 · Dec 31, 2009