IP Library Granted Patent US 8,362,563
Granted Patent B2
US 8,362,563 · App. 13/558,638 · Granted Jan 29, 2013

Thin film transistor, method for manufacturing the same, and semiconductor device

Inventors: Toshikazu Kondo (Atsugi, JP); Hideyuki Kishida (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,362,563
App. No.
13/558,638
Granted
Jan 29, 2013
Kind
B2
Abstract

In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.

Claims (57)

1. A transistor comprising:

a gate electrode layer;

a gate insulating layer provided over the gate electrode layer;

an oxide semiconductor layer provided over the gate insulating layer;

a pair of conductive layers provided over the oxide semiconductor layer;

a metal oxide layer provided over the oxide semiconductor layer and between the pair of conductive layers, wherein the metal oxide layer contains a same metal element as the pair of conductive layers, and has a higher oxygen concentration than the pair of conductive layers;

a source electrode layer provided over one of the pair of conductive layers; and

a drain electrode layer provided over the other of the pair of conductive layers.

2. The transistor according to claim 1 , further comprising, between the oxide semiconductor layer and each of the pair of conductive layers:

a pair of oxide semiconductor layers whose oxygen concentration is lowered and which are provided over the oxide semiconductor layer; and

a pair of conductive layers containing oxygen at high concentration and provided over the pair of oxide semiconductor layers whose oxygen concentration is lowered.

3. The transistor according to claim 1 , wherein the metal oxide layer is an insulator.

4. The transistor according to claim 1 , wherein the metal oxide layer is a semiconductor.

5. The transistor according to claim 1 , wherein the pair of conductive layers is selected from titanium, copper, zinc, aluminum, or an alloy containing at least one of titanium, copper, zinc, and aluminum.

6. The transistor according to claim 1 , further comprising an interlayer insulating layer provided over the source electrode layer and the drain electrode layer.

7. A transistor comprising:

a gate electrode layer;

a gate insulating layer provided over the gate electrode layer;

an oxide semiconductor layer provided over the gate insulating layer;

a pair of conductive layers provided over the oxide semiconductor layer;

a metal oxide layer provided over the oxide semiconductor layer and between the pair of conductive layers;

a source electrode layer provided over one of the pair of conductive layers; and

a drain electrode layer provided over the other of the pair of conductive layers.

8. The transistor according to claim 7 , wherein the metal oxide layer is an insulator.

9. The transistor according to claim 7 , wherein the metal oxide layer is a semiconductor.

10. The transistor according to claim 7 , wherein the pair of conductive layers is selected from titanium, copper, zinc, aluminum, or an alloy containing at least one of titanium, copper, zinc, and aluminum.

11. The transistor according to claim 7 , further comprising an interlayer insulating layer provided over the source electrode layer and the drain electrode layer.

12. The transistor according to claim 7 , wherein end surfaces of the pair of conductive layers are aligned with end surfaces of the oxide semiconductor layer.

13. The transistor according to claim 7 , wherein the metal oxide layer is thicker than the pair of conductive layers.

14. A transistor comprising:

a gate electrode layer;

a gate insulating layer provided over the gate electrode layer;

an oxide semiconductor layer provided over the gate insulating layer;

a pair of conductive layers provided over the oxide semiconductor layer;

a metal oxide layer provided over the oxide semiconductor layer and between the pair of conductive layers, wherein the metal oxide layer contains a same metal element as the pair of conductive layers;

a source electrode layer provided over one of the pair of conductive layers; and

a drain electrode layer provided over the other of the pair of conductive layers.

15. The transistor according to claim 14 , wherein the metal oxide layer is an insulator.

16. The transistor according to claim 14 , wherein the metal oxide layer is a semiconductor.

17. The transistor according to claim 14 , wherein the pair of conductive layers is selected from titanium, copper, zinc, aluminum, or an alloy containing at least one of titanium, copper, zinc, and aluminum.

18. The transistor according to claim 14 , further comprising an interlayer insulating layer provided over the source electrode layer and the drain electrode layer.

19. The transistor according to claim 14 , wherein end surfaces of the pair of conductive layers are aligned with end surfaces of the oxide semiconductor layer.

20. The transistor according to claim 14 , wherein the metal oxide layer is thicker than the pair of conductive layers.

21. A transistor comprising:

a gate electrode layer;

a gate insulating layer provided over the gate electrode layer;

an oxide semiconductor layer provided over the gate insulating layer;

a pair of conductive layers provided over the oxide semiconductor layer;

a metal oxide layer provided over the oxide semiconductor layer and between the pair of conductive layers, wherein the metal oxide layer has a higher oxygen concentration than the pair of conductive layers;

a source electrode layer provided over one of the pair of conductive layers; and

a drain electrode layer provided over the other of the pair of conductive layers.

22. The transistor according to claim 21 , wherein the metal oxide layer is an insulator.

23. The transistor according to claim 21 , wherein the metal oxide layer is a semiconductor.

24. The transistor according to claim 21 , wherein the pair of conductive layers is selected from titanium, copper, zinc, aluminum, or an alloy containing at least one of titanium, copper, zinc, and aluminum.

25. The transistor according to claim 21 , further comprising an interlayer insulating layer provided over the source electrode layer and the drain electrode layer.

26. The transistor according to claim 21 , wherein end surfaces of the pair of conductive layers are aligned with end surfaces of the oxide semiconductor layer.

27. The transistor according to claim 21 , wherein the metal oxide layer is thicker than the pair of conductive layers.

Priority Claims (1)
JP 2009-037912 · Feb 20, 2009 · national
Continuity (2)
Division 12699080 · Feb 3, 2010
Related Publication 20120286278A1 · Nov 15, 2012